NCP1380CDR2G ON Semiconductor, NCP1380CDR2G Datasheet - Page 13

• Manufacturer Part Number: NCP1380CDR2G
• Description: IC PWM FLYBCK ISO CM 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1380CDR2G

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 65kHz
• Voltage - Supply: 9.4 V ~ 28 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 65kHz
• Mounting Style: SMD/SMT
• Operating Supply Voltage: - 0.3 V to + 28 V
• Supply Current: +/- 30 mA
• Maximum Operating Temperature: + 125 C
• Fall Time: 25 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 40 ns
• Synchronous Pin: No
• Topology: Quasi-Resonant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Duty Cycle: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

architecture operating in quasi−resonant mode. Due to a
proprietary
valley−jumping instability and steadily locks out in selected
valley as the power demand goes down. Once the fourth
valley is reached, the controller continues to reduce the
frequency further down, offering excellent efficiency over
a wide operating range. Thanks to a fault timer combined to
an OPP circuitry, the controller is able to efficiently limit the
output power at high−line.
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operation and VCO operation for the frequency foldback.
portrayed by Figure 26:
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The NCP1380 implements a standard current−mode
NCP1380 has two operating mode: quasi−resonant
The operating mode is fixed by the FB voltage as
Quasi−Resonance Current−mode operation:
implementing quasi−resonance operation in peak
current−mode control, the NCP1380 optimizes the
efficiency by switching in the valley of the MOSFET
drain−source voltage. Thanks to a proprietary circuitry,
the controller locks−out in a selected valley and
remains locked until the output loading significantly
changes. When the load becomes lighter, the controller
jumps into the next valley. It can go down to the 4
valley if necessary. Beyond this point, the controller
reduces its switching frequency by freezing the peak
current setpoint. During quasi−resonance operation, in
case of very damped valleys, a 5.5 ms timer emulates
the missing valleys.
Frequency reduction in light−load conditions: when
the 4
switching frequency which naturally improves the
standby power by a reduction of all switching losses.
Overpower protection (OPP): When the voltage on
ZCD pin swings in flyback polarity, a direct image if
the input voltage is applied on ZCD pin. We can thus
reduce the peak current depending of V
on−time.
Internal soft−start: A soft−start precludes the main
power switch from being stressed upon startup. Its
duration is fixed and equal to 4 ms.
Quasi−resonant operation occurs for FB voltage higher
than 0.8 V (FB decreasing) or higher than 1.4 V (FB
increasing) which correspond to high output power and
medium output power. The peak current is variable and
is set by the FB voltage divided by 4.
Frequency foldback or VCO mode occurs for FB
voltage lower than 0.8 V (FB decreasing) or lower than
1.4 V (FB increasing). This corresponds to low output
th
valley is left, the controller reduces the
circuitry,
the
controller
ZCD
NCP1380 OPERATING MODES
APPLICATION INFORMATION
during the
prevents
http://onsemi.com
th
13
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Fault input (A and B versions): By combining a dual
threshold on the Fault pin, the controller allows the
direct connection of an NTC to ground plus a zener
diode to a monitored voltage. In case the pin is brought
below the OTP threshold by the NTC or above the OVP
threshold by the zener diode, the circuit permanently
latches−off and V
Fault input (C and D versions): The C and D versions
of NCP1380 include a brown−out circuit which safely
stops the controller in case the input voltage is too low.
Restart occurs via a complete startup sequence (latch
reset and soft−start). During normal operation, the
voltage on this pin is clamped to V
room for OVP detection. If the voltage on this pin
increases above 2.5 V, the part latches−off.
Short−circuit protection: Short−circuit and especially
over−load protections are difficult to implement when a
strong leakage inductance between auxiliary and power
windings affects the transformer (where the auxiliary
winding level does not properly collapse in presence of
an output short). Here, when the internal 0.8 V
maximum peak current limit is activated, the timer
starts counting up. If the fault disappears, the timer
counts down. If the timer reaches completion while the
error flag is still present, the controller stops the pulses.
This protection is latched on A and C version (the user
must unplug and re−plug the power supply to restart the
controller) and auto−recovery on B and D versions (if
the fault disappears, the SMPS automatically resumes
operation). In addition, all versions feature a winding
short−circuit protection, that senses the CS signal and
stops the controller if V
reduced LEB of t
enabled only during the main LEB duration t
noise immunity reason.
power.
During VCO mode, the peak current decreases down to
17.5% of its maximum value and is then frozen. The
switching frequency is variable and decreases as the
output load decreases.
The switching frequency is set by the end of charge of
the capacitor connected to the C
charged with a constant current source and the
capacitor voltage is compared to an internal threshold
fixed by FB voltage. When this capacitor voltage
reaches the threshold the capacitor is rapidly discharged
down to 0 V and a new period start.
BCS
CC
is clamped to 7.2 V.
). This additional comparator is
CS
reaches 1.5 x V
T
pin. This capacitor is
clamp
to give enough
ILIM
LEB
(after a
, for