NCP1380CDR2G ON Semiconductor, NCP1380CDR2G Datasheet - Page 23

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NCP1380CDR2G

Manufacturer Part Number
NCP1380CDR2G
Description
IC PWM FLYBCK ISO CM 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1380CDR2G

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
65kHz
Voltage - Supply
9.4 V ~ 28 V
Buck
No
Boost
No
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
65kHz
Mounting Style
SMD/SMT
Operating Supply Voltage
- 0.3 V to + 28 V
Supply Current
+/- 30 mA
Maximum Operating Temperature
+ 125 C
Fall Time
25 ns
Minimum Operating Temperature
- 40 C
Rise Time
40 ns
Synchronous Pin
No
Topology
Quasi-Resonant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Duty Cycle
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP1380CDR2G
Manufacturer:
ON Semiconductor
Quantity:
2 000
Company:
Part Number:
NCP1380CDR2G
Quantity:
2 500
Company:
Part Number:
NCP1380CDR2G
Quantity:
70
by reading the voltage on pin 7 (See Figure 41).
Temperature Coefficient sensor (NTC), naturally imposing
a dc voltage on the OTP pin. An internal clamp limit the
pin 7 voltage to 1.2 V when the NTC resistance is high (For
example, at 25°C, R
increases, the NTC’s resistance reduces bringing the pin 7
voltage down until it reaches a typical value of 0.8 V: the
comparator trips and latches−off the controller (see
Figure 42).
Overvoltage and overtemperature detection is achieved
VCC
The I
NTC
Dz
OTP(REF)
Fa ult
7
current (91 mA typ.) biases the Negative
OVERVOLTAGE / OVERTEMPERATURE DETECTION (A AND B VERSIONS)
VDD
NTC
I OTP(REF)
Rc l a mp
Vclam p
> 100 kW). When the temperature
Figure 42. Overvoltage and Overtemperature Chronograms
V
OTP
V
OVP
+
+
OT Pc o mp
OVPcomp
Figure 41. OVP/OTP Circuitry
http://onsemi.com
SS end
23
nois e de lay
and inject current inside the internal clamp resistor R
thus causing the pin 7 voltage to increase. When this voltage
reaches the OVP threshold (2.5 V typ), the controller is
latched−off: all the DRV pulses stops and V
pulled−down to V
un−latches when the current circulating in V
below I
power supply.
In case of overvoltage, the zener diode starts to conduct
nois e de lay
CC(latch)
, thus the user must unplug and replug the
CC(latch)
grand
reset
(7.2 V typ). The circuit
R
S
Q
Q
CC
pin drops
Latch
CC
clamp
is

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