NCP1380CDR2G ON Semiconductor, NCP1380CDR2G Datasheet - Page 4

• Manufacturer Part Number: NCP1380CDR2G
• Description: IC PWM FLYBCK ISO CM 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1380CDR2G

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 65kHz
• Voltage - Supply: 9.4 V ~ 28 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 65kHz
• Mounting Style: SMD/SMT
• Operating Supply Voltage: - 0.3 V to + 28 V
• Supply Current: +/- 30 mA
• Maximum Operating Temperature: + 125 C
• Fall Time: 25 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 40 ns
• Synchronous Pin: No
• Topology: Quasi-Resonant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Duty Cycle: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Rsense
La ux
ZCD
CS
FB
Ct
Rpullup
VDD
ICt
VDD
/ 4
LEB 2 is shorter than LEB 1
I
peak(VCO)
LEB 2
LEB 1
10 V
ESD
Ct s e tpoi nt
Discharge
DRV
= 17.5% V
Ct
SS end
Vth
V ILIMIT
Figure 3. Internal Circuit Architecture for Versions A and B
3 ms blanking
ILIMIT
SS end
+
−
+
−
OPP
INTERNAL CIRCUIT ARCHITECTURE
The 40 ms Time Out is active
only during s oft−s ta r t
Soft-start
SS end
V C S(stop)
Ti me Out
Ti me Out
40 ms
5 ms
de ma g
Soft−s ta rt e nd ? the n 1
else 0
L OGI C BL OCK
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−
+
+
−
+
−
VDD
4
PWMreset
IpFlag
CsS top
S
R
Q
DRV
Q
latch
noi s e de l a y
Q
P W Mr eset
Q
gr a nd
reset
V
noi s e de l a y
VDD
gr a nd
reset
R
S
CC
IpFlag
A:
l a tc he d
management
fa ul t
SS end
BO r eset
VCCstop
Up
Down
gr a nd
−
−
+
+
reset
Cs S top
TIM ER
I OTP(REF)
V OVP
V OTP
Reset
clamp
VDD
VCC
DRV
GN D
Fa ul t
ga te
VCC
aux