HIP6301VCB-T Intersil, HIP6301VCB-T Datasheet - Page 5

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HIP6301VCB-T

Manufacturer Part Number
HIP6301VCB-T
Description
IC CTRLR PWM MULTIPH BUCK 20SOIC
Manufacturer
Intersil
Datasheet

Specifications of HIP6301VCB-T

Pwm Type
Controller
Number Of Outputs
4
Frequency - Max
336kHz
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Frequency-max
336kHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Duty Cycle
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HIP6301VCB-T
Manufacturer:
ELANTEC
Quantity:
1 000
Part Number:
HIP6301VCB-T
Manufacturer:
INTERSIL
Quantity:
20 000
HIP6301V and HIP6302V Functional Pin Descriptions
VID4, VID3, VID2, VID1 and VID0
(Pins 1 thru 5 - Both Parts)
Voltage Identification inputs. The HIP6301V and HIP6302V
decode the VID bits to establish the reference voltage (see
Table 1). Each pin has an internal 20µA pull-up current source
to 2.5V making the parts compatible with CMOS and TTL
logic from 5V down to 2.5V. When a VID change is detected,
the reference voltage slowly ramps up or down to the new
value in 25mV steps. VID input levels above 2.9V may
produce an reference-voltage offset inaccuracy.
COMP (Pin 6 - Both Parts)
Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.
FB (Pin 7 - Both Parts)
Inverting input of the internal error amplifier.
FS/DIS (Pin 8 - Both Parts)
Channel frequency, F
this pin to ground sets the switching frequency of the
converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 10.
GND (Pin 9 - Both Parts)
Bias and reference ground. All signals are referenced to this
pin.
VSEN (Pin 10 - Both Parts)
Power-good monitor input. Connect to the microprocessor CORE
voltage.
FS/DIS
COMP
VSEN
VID4
VID3
VID2
VID1
VID0
GND
FB
SW
10
1
2
3
4
5
6
7
8
9
, select and disable. A resistor from
(20 LD SOIC
TOP VIEW
HIP6301V
5
20
19
18
17
16
15
14
13
12
11
V
PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
ISEN2
ISEN3
PWM3
CC
HIP6301V, HIP6302V
PWM1 (Pin 15 - HIP6301V, Pin 13 - HIP6302V),
PWM2 (Pin 14 - HIP6301V, Pin 12 - HIP6302V),
PWM3 (Pin 11 - HIP6301V only) and PWM4
(Pin 18 - HIP6301V only)
PWM outputs for each channel. Connect these pins to the
PWM input of the external MOSFET driver. For HIP6301V
systems using 3 channels, connect PWM4 high. For two
channel systems, connect PWM3 and PWM4 high.
ISEN1 (Pin 16 - HIP6301V, Pin 14 - HIP6302V),
ISEN2 (Pin 13 - HIP6301V, Pin 11 - HIP6302V),
ISEN3 (Pin 12 - HIP6301V only) and ISEN4
(Pin 17 - HIP6301V only)
Current sense inputs from the individual converter channel’s
phase nodes. Unused sense lines MUST be left open.
PGOOD (Pin 19 - HIP6301V, Pin 15 - HIP6302V)
Power-good. This pin is an open-drain logic signal that
indicates when the microprocessor CORE voltage (VSEN
pin) is within specified limits and soft-start has timed out.
V
Bias supply. Connect this pin to a 5V supply.
CC
(Pin 20 - HIP6301V, Pin 16 - HIP6302V)
FS/DIS
COMP
VID4
VID3
VID2
VID1
VID0
FB
1
2
3
4
5
6
7
8
(16 LD SOIC
TOP VIEW
HIP6302V
14
13
12
11
10
16
15
9
V
PGOOD
ISEN1
PWM1
PWM2
ISEN2
VSEN
GND
CC
May 5, 2008
FN9034.3

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