CS5124XD8 ON Semiconductor, CS5124XD8 Datasheet
CS5124XD8
Specifications of CS5124XD8
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CS5124XD8 Summary of contents
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... Year W = Work Week G = Pb−Free Package ORDERING INFORMATION Device Package CS5124XD8 SOIC−8 CS5124XD8G SOIC−8 (Pb−Free) CS5124XDR8 SOIC−8 CS5124XDR8G SOIC−8 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...
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L1 36−75V 200 100 V 0 100 V 17.4 k ENABLE C9 1000 pF 48VRTN MAXIMUM RATINGS Operating Junction Temperature Storage Temperature Range ESD Susceptibility ...
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ELECTRICAL CHARACTERISTICS 0.33 mF 1.0 nF (ESR = SENSE V(CC) GATE Characteristic General I Operating − V not switching CC GATE Low ...
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ELECTRICAL CHARACTERISTICS (continued 0.33 mF 1.0 nF (ESR = SENSE V(CC) GATE Characteristic Soft−Start Soft−Start Charge Current Soft−Start Discharge Current V Voltage when V Begins ...
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PIN # Pin Power Input Pin BIAS V Clamp Output Pin. This pin will control the gate of an N−channel MOSFET that in turn regulates Vcc. This pin is CC internally clamped at 15 ...
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V UVLO COMP REF − ENABLE + V 7.7 V/7.275 V INE UVLO COMP L − TSHUT + 150 C/125 C 2.62 V/2. UVLO − REMOTE BIAS (SLEEP) ...
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Soft−Start error amp is clamped at 2.9 V. During fault conditions the Soft−Start capacitor is discharged at 10 mA. Fault Conditions The CS5124 recognizes the following faults: UVLO off, Thermal Shutdown and Second Current REF(OK) Threshold. Once ...
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UVLO and Thermal Shutdown Interaction The UVLO pin and thermal shutdown circuit share the same internal comparator. During high temperature operation (T > 100 C) the UVLO pin will interact with the J thermal shutdown circuit. This interaction increases the ...
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If the second current sense threshold is tripped, the converter will shut off and restart in Soft−Start mode until the high current condition is removed. The dead time after a second threshold overcurrent condition will primarily be determined by ...
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... SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE THERMAL DATA Parameter R qJC R qJA PACKAGE DIMENSIONS SOIC−8 D SUFFIX CASE 751−07 ISSUE AG ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...