ISL6556BCBZ Intersil, ISL6556BCBZ Datasheet - Page 17
![no-image](/images/manufacturer_photos/0/3/341/intersil_sml.jpg)
ISL6556BCBZ
Manufacturer Part Number
ISL6556BCBZ
Description
IC CTRLR MULTIPHASE VRM10 28SOIC
Manufacturer
Intersil
Datasheet
1.ISL6556BCBZ-T.pdf
(24 pages)
Specifications of ISL6556BCBZ
Applications
Controller, Intel VR10X
Voltage - Input
3 ~ 12 V
Number Of Outputs
4
Voltage - Output
0.84 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISL6556BCBZ
Manufacturer:
INTERSIL
Quantity:
1 051
Part Number:
ISL6556BCBZ
Manufacturer:
INTERSI
Quantity:
20 000
Company:
Part Number:
ISL6556BCBZ-T
Manufacturer:
INTERSIL
Quantity:
1 999
Part Number:
ISL6556BCBZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
PGOOD will return high unless the controller has been
disabled. PGOOD does not automatically transition low upon
detection of an overvoltage condition.
Undervoltage Detection
The undervoltage threshold is set at 75% of the VID code.
When the output voltage at VSEN is below the undervoltage
threshold, PGOOD gets pulled low.
Overvoltage Protection
When VCC is above 1.4V, but otherwise not valid as defined
under Power on Reset in Electrical Specifications, the
overvoltage trip circuit is active using auxiliary circuitry. In
this state, an overvoltage trip occurs if the voltage at VSEN
exceeds 1.8V.
With valid VCC, the overvoltage circuit is sensitive to the
voltage at VDIFF. In this state, the trip level is 1.7V prior to
valid enable conditions being met as described in Enable
and Disable. The only exception to this is when the IC has
been disabled by an overvoltage trip. In that case the
overvoltage trip point is VID plus 200mV. During soft-start,
the overvoltage trip level is the higher of 1.7V or VID plus
200mV. Upon successful soft-start, the overvoltage trip level
is 200mV above VID. Two actions are taken by the ISL6556B
to protect the microprocessor load when an overvoltage
condition occurs.
At the inception of an overvoltage event, all PWM outputs
are commanded low until the voltage at VSEN falls below
0.6V with valid VCC or 1.5V otherwise. This causes the
Intersil drivers to turn on the lower MOSFETs and pull the
output voltage below a level that might cause damage to the
load. The PWM outputs remain low until VDIFF falls to the
programmed DAC level when they enter a high-impedance
state. The Intersil drivers respond to the high-impedance
input by turning off both upper and lower MOSFETs. If the
overvoltage condition reoccurs, the ISL6556B will again
command the lower MOSFETs to turn on. The ISL6556B will
continue to protect the load in this fashion as long as the
overvoltage condition recurs.
Simultaneous to the protective action of the PWM outputs, the
OVP pin pulls to VCC delivering up to 100mA to the gate of a
crowbar MOSFET or SCR placed either on the input rail or the
output rail. Turning on the MOSFET or SCR collapses the
power rail and causes a fuse placed further up stream to blow.
The fuse must be sized such that the MOSFET or SCR will
not overheat before the fuse blows. The OVP pin is tolerant to
12V (see Absolute Maximum Ratings), so an external resistor
pull up can be used to augment the driving capability. If using
a pull up resistor in conjunction with the internal overvoltage
protection function, care must be taken to avoid nuisance trips
that could occur when VCC is below 2V. In that case, the
controller is incapable of holding OVP low.
Once an overvoltage condition is detected, normal PWM
operation ceases until the ISL6556B is reset. Cycling the
17
ISL6556B
voltage on EN or ENLL or VCC below the POR-falling
threshold will reset the controller. Cycling the VID codes will
not reset the controller.
Overcurrent Protection
ISL6556B has two levels of overcurrent protection. Each
phase is protected from a sustained overcurrent condition on
a delayed basis, while the combined phase currents are
protected on an instantaneous basis.
In instantaneous protection mode, the ISL6556B takes
advantage of the proportionality between the load current
and the average current, I
condition. See the Channel-Current Balance section for
more detail on how the average current is measured. The
average current is continually compared with a constant
100µA reference current as shown in Figure 10. Once the
average current exceeds the reference current, a comparator
triggers the converter to shutdown.
In individual overcurrent protection mode, the ISL6556B
continuously compares the current of each channel with the
same 100µA reference current. If any channel current exceeds
the reference current continuously for eight consecutive cycles,
the comparator triggers the converter to shutdown.
At the beginning of overcurrent shutdown, the controller
places all PWM signals in a high-impedance state
commanding the Intersil MOSFET driver ICs to turn off both
upper and lower MOSFETs. The system remains in this
state a period of 4096 switching cycles. If the controller is still
enabled at the end of this wait period, it will attempt a soft-
start. If the fault remains, the trip-retry cycles will continue
indefinitely (as shown in Figure 11) until either controller is
disabled or the fault is cleared. Note that the energy
delivered during trip-retry cycling is much less than during
full-load operation, so there is no thermal hazard during this
kind of operation.
FIGURE 11. OVERCURRENT BEHAVIOR IN HICCUP MODE.
0A
0V
OUTPUT CURRENT, 50A/DIV
F
OUTPUT VOLTAGE,
500mV/DIV
SW
= 500kHz
AVG
2ms/DIV
, to detect an overcurrent
December 28, 2004
FN9097.4