ISL62881CHRTZ-T Intersil, ISL62881CHRTZ-T Datasheet

IC REG PWM SGL PHASE 28TQFN

ISL62881CHRTZ-T

Manufacturer Part Number
ISL62881CHRTZ-T
Description
IC REG PWM SGL PHASE 28TQFN
Manufacturer
Intersil
Datasheet

Specifications of ISL62881CHRTZ-T

Applications
Controller, Intel IMVP-6.5™
Voltage - Input
4.5 ~ 25 V
Number Of Outputs
1
Voltage - Output
0.0125 ~ 1.5 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
28-VQFN
For Use With
ISL62881CCPUEVAL2Z - EVAL BOARD ISL62881CCPU 28QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL62881CHRTZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Single-Phase PWM Regulator for IMVP-6.5™ Mobile
CPUs and GPUs
ISL62881C, ISL62881D
The ISL62881C provides a complete solution for
microprocessor and graphic processor core power supply
with it’s integrated gate drive. Based on Intersil’s Robust
Ripple regulator (R3™) technology, the PWM modulator
compared to traditional modulators, has faster transient
settling time, variable switching frequency during load
transients and has improved light load efficiency with its
ability to automatically change switching frequency.
Fully compliant with IMVP6.5™, the ISL62881C is easily
configurable as a CPU or graphics V
offering: responds to DPRSLPVR signals by
entering/exiting diode emulations mode; reports
regulator output current via the IMON pin; senses
current by using a discrete resistor or the inductor;
over-temperature thermal compensation of DCR, using a
single NTC thermistor; differential sensing to accurately
monitor and adjust processor die voltage; minimizes
body diode conduction loss in diode emulation mode with
it’s adaptive body diode conduction time.
Need to aggressively reduce the output capacitor? The
overshoot reduction function is user-selectable and can
be disabled for those concerned about increased system
thermal stress.
Maintaining all the ISL62881C functions, the ISL62881D
offers VR_TT# function for thermal throttling control. It
also offers the split LGATE function to further improve
light load efficiency.
Load Line Regulation
March 8, 2010
FN7596.0
1
CORE
0.91
0.90
0.89
0.88
0.87
0.86
0.85
0.84
0.83
0.82
0.81
0.80
1-888-INTERSIL or 1-888-468-3774
0
controllers by
2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
V
IN
4
= 19V
6
8
I
V
10
OUT
IN
Features
• Precision Core Voltage Regulation
• Supports Multiple Current Sensing Methods
• Current Monitor
• Differential Remote Voltage Sensing
• Integrated Gate Driver
• Split LGATE Driver to Increase Light-Load Efficiency
• Adaptive Body Diode Conduction Time Reduction
• User-selectable Overshoot Reduction Function
• Small Footprint 28 Ld 4x4 or 32 Ld 5x5 TQFN
Applications
• Notebook Core Voltage Regulator
• Notebook GPU Voltage Regulator
Related Literature
• See
• See
= 12V
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
- Lossless Inductor DCR Current Sensing
- Precision Resistor Current Sensing
(For ISL62881D)
Package
“ISL62881CCPUEVAL2Z User Guide”
“ISL62881CGPUEVAL2Z User Guide”
12
(A)
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
14
AN1552
AN1553
V
16
IN
Copyright © Intersil Americas Inc. 2010. All Rights Reserved
= 8V
18
for Evaluation Board Application Note
for Evaluation Board Application Note
20
22

Related parts for ISL62881CHRTZ-T

ISL62881CHRTZ-T Summary of contents

Page 1

... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. for Evaluation Board Application Note ...

Page 2

... Ordering Information PART NUMBER (Notes PART MARKING ISL62881CHRTZ 62881C HRTZ ISL62881CIRTZ 62881C IRTZ ISL62881DHRTZ 62881D HRTZ NOTES: 1. Add “-T” suffix for tape and reel. Please refer to 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...

Page 3

Pin Function Description ISL62881C ISL62881D SYMBOL COMP VSEN 8 10 RTN 9, 10 11, 12 ISUM- and ISUM VDD 12 14 VIN 13 15 IMON 14 16 BOOT ...

Page 4

Block Diagram VR_ON MODE CONTROL DPRSLPVR RBIAS VID0 VID1 VID2 DAC AND VID3 SOFT START VID4 VID5 VID6 Σ RTN FB COMP VW Idroop Imon IMON ISUM+ CURRENT SENSE ISUM- 4 ISL62881C, ISL62881D ISL62881C, ISL62881D VIN VSEN PGOOD CLK_EN# PGOOD ...

Page 5

Table of Contents Related Literature . . . . . . . . . . . . . . . . . . . . . . 1 Load Line Regulation . . . . . . . . . ...

Page 6

... Recommended Operating Conditions Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . +5V ±5% Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . +4.5V to 25V Ambient Temperature ISL62881CHRTZ, ISL62881DHRTZ . . . . . -10°C to +100°C ISL62881CIRTZ . . . . . . . . . . . . . . . . . . -40°C to +100°C Junction Temperature ISL62881CHRTZ, ISL62881DHRTZ . . . . . -10°C to +125°C ISL62881CIRTZ . . . . . . . . . . . . . . . . . . -40°C to +125° -40°C to +100° TEST CONDITIONS I ...

Page 7

Electrical Specifications Operating Conditions: V noted. Boldface limits apply over the operating temperature range, -40°C to +100°C. (Continued) PARAMETER SYMBOL CHANNEL FREQUENCY Nominal Channel Frequency f SW(nom) Adjustment Range AMPLIFIERS Current-Sense Amplifier Input Offset Error Amp DC Gain (Note 6) ...

Page 8

... 25V VSEN rising above setpoint for >1ms H VSEN rising for >2µs HS ISUM- pin current, R COMP UV VSEN falling below setpoint for >1.2ms f ISL62881CHRTZ ISL62881CIRTZ NTC = 1.3V V (NTC) falling 20mA 4mA OL I CLK_EN# = 3.3V OH ISUM- pin current = 20µA IMON ISUM- pin current = 10µA ISUM- pin current = 5µ ...

Page 9

Gate Driver Timing Diagram PWM t LGFUGR UGATE 1V LGATE t FL Simplified Application Circuits < 0:6 > ...

Page 10

Simplified Application Circuits PGOOD CLK_EN# VID<0:6> DPRSLPVR VR_ON VCC VSS IMON FIGURE 2. ISL62881C TYPICAL APPLICATION CIRCUIT USING RESISTOR SENSING < ...

Page 11

Simplified Application Circuits VR_TT# PGOOD CLK_EN# VID<0:6> DPRSLPVR VR_ON R DROOP VCC SENSE VSS SENSE IMON FIGURE 4. ISL62881D TYPICAL APPLICATION CIRCUIT USING RESISTOR SENSING 11 ISL62881C, ISL62881D ISL62881C, ISL62881D (Continued) V+5 V VCCP V BIAS ...

Page 12

... PWM pulse is held off until needed. The VW voltage falls as the VW voltage falls, reducing the current PWM pulse width. This kind of behavior gives the ISL62881C excellent response speed. ™ protocol. It uses Intersil patented ™ ) modulator. The R 3™ modulator circuit, and Figure 6 shows ...

Page 13

Diode Emulation and Period Stretching FIGURE 8. DIODE EMULATION ISL62881C can operate in diode emulation (DE) mode to improve light load efficiency. In ...

Page 14

V , with the soft-start sequence starting 120µs after DD V crosses the POR threshold. DD Figure 11 shows the typical start-up timing when the ISL62881C is configured for GPU VR application. The ISL62881C uses digital soft-start to ramp-up ...

Page 15

TABLE 1. VID TABLE (Continued) VID6 VID5 VID4 VID3 VID2 VID1 VID0 ...

Page 16

R . The current source is used for i load line implementation, current monitor and overcurrent protection. Figure 12 shows the load line implementation. The ISL62881C drives a current source I pin, described by Equation ...

Page 17

ISL62881C monitors the VSEN pin voltage and compares it to 100ns filtered version. When the unfiltered version is 20mV below the filtered version, the controller knows there is a fast voltage dip due to load insertion, hence issues an additional ...

Page 18

As Figures 1 and 2 show, a resistor R the IMON pin to convert the IMON pin current to voltage. A capacitor can be paralleled with R voltage information. The IMVP-6.5™ specification requires that the IMON voltage information be referenced ...

Page 19

... A good NTC network can limit the output voltage drift to within 2mV recommended to follow the Intersil evaluation board layout and current-sensing network parameters to minimize engineering time. V (s) also needs to represent real-time I Cn controller to achieve good transient response ...

Page 20

RING BACK FIGURE 17. OUTPUT VOLTAGE RING BACK PROBLEM Rntcs Cn Rntc OPTIONAL OPTIONAL FIGURE 18. OPTIONAL CIRCUITS FOR RING BACK REDUCTION Figure 17 shows the output voltage ring back problem during ...

Page 21

Transfer function A (s) always has unity gain at DC. Rsen Current-sensing resistor R value will not have sen significant variation over-temperature, so there is no need for the NTC network. The recommended values are R sum C = 5600pF. ...

Page 22

... O VR VID FIGURE 20. VOLTAGE REGULATOR EQUIVALENT Intersil provides a Microsoft Excel-based spreadsheet to help design the compensator and the current sensing network, so the VR achieves constant output impedance as a stable system. Figure 23 shows a screenshot of the spreadsheet with active droop function is a dual-loop system consisting of a voltage loop and a droop loop which is a current loop ...

Page 23

... Compensation & Current Sensing Network Design for Intersil Multiphase R^3 Regulators for IMVP-6.5 Jia Wei, jwei@intersil.com, 919-405-3605 Attention: 1. "Analysis ToolPak" Add-in is required. To turn on Tools--Add-Ins, and check "Analysis ToolPak". 2. Green cells require user input Operation Parameters Controller Part Number: Phase Number: ...

Page 24

Optional Slew Rate Compensation Circuit for 1-Tick VID Transition Rdroop C R vid I FB vid Idroop_vid E/A Σ COMP DAC VDAC X 1 INTERNAL TO IC VID<0:6> Vfb Ivid Vcore Idroop_vid FIGURE 24. OPTIONAL SLEW RATE COMPENSATION CIRCUIT FOR1-TICK ...

Page 25

SW1 NTC - + + V R NTC NTC - SW2 1.24V R s 1.20V FIGURE 25. CIRCUITRY ASSOCIATED WITH THE THERMAL THROTTLING FEATURE OF THE ISL62881C When temperature increases, the NTC thermistor resistance decreases so the NTC ...

Page 26

TABLE 5. LAYOUT CONSIDERATIONS (Continued) NAME VSEN Place the VSEN/RTN filter (C12, C13) in close proximity of the controller for good decoupling. RTN VDD A capacitor (C16) decouples it to GND. Place it in close proximity of the controller. IMON ...

Page 27

VID0 IN VID1 IN VID2 IN VID3 IN VID4 IN VID5 IN VID6 IN VR_ON IN DPRSLPVR IN +3.3V IN PGOOD OUT OPTIONAL 1 ---- CLK_EN# 2 PGOOD R16 3 RBIAS 47. ---- 5 COMP ISL62881C 6 FB ...

Page 28

VID0 IN VID1 IN VID2 IN VID3 IN VID4 IN VID5 IN VID6 IN VR_ON IN DPRSLPVR IN +3.3V IN CLK_EN# OUT PGOOD OUT OPTIONAL 1 ---- CLK_EN# 2 PGOOD R16 3 RBIAS 147K 4 VW ---- 5 COMP ISL62881C ...

Page 29

CPU Application Reference Design Bill of Materials QTY REFERENCE VALUE 1 C11 1000pF Multilayer Cap, 16V, 10% 1 C12 330pF Multilayer Cap, 16V, 10% 1 C13 1000pF Multilayer Cap, 16V, 10% 2 C16, C22 1µF Multilayer Cap, 16V, 20% 1 ...

Page 30

... MURATA Kyocera TDK GENERIC GENERIC PANASONIC NEC-TOKIN IR IR GENERIC GENERIC (Continued) PART NUMBER PACKAGE H2511-09091-1/16W1 SM0603 H2511-01821-1/16W1 SM0805 H2511-02263-1/16W1 SM0603 ISL62881CHRTZ QFN-28 PART NUMBER PACKAGE H1045-00391-16V10 SM0603 H1045-00331-16V10 SM0603 H1045-00102-16V10 SM0603 H1045-00105-16V20 SM0603 SM0603 H1045-00274-16V10 H1045-00104-16V10 SM0603 H1045-00224-25V10 SM0603 SM0603 H1045-00473-16V10 ...

Page 31

... PANASONIC GENERIC GENERIC GENERIC GENERIC INTERSIL (Continued) PART NUMBER PACKAGE H2511-04752-1/16W1 SM0603 H2511-00100-1/16W1 SM0603 H2511-01911-1/16W1 SM0603 H2511-00R00-1/16W1 SM0603 SM0603 H2511-01071-1/16W1 H2511-01R00-1/16W1 SM0603 H2511-01102-1/16W1 SM0603 H2511-02611-1/16W1 SM0603 ERT-J1VR103J SM0603 H2511-07151-1/16W1 SM0603 H2511-08661-1/16W1 SM0603 H2511-03651-1/16W1 SM0805 SM0603 H2511-02613-1/16W1 ISL62881CHRTZ QFN-28 March 8, 2010 FN7596.0 ...

Page 32

Typical Performance 12V (A) OUT FIGURE 28. ISL62881CCPUEVAL2ZEVALUATION BOARD CCM EFFICIENCY, VID = 0.9V, ...

Page 33

Typical Performance FIGURE 34. CPU MODE SHUT DOWN 0A, VID = 1.2V, Ch1: PHASE, Ch2 FIGURE 36. CCM STEADY STATE, CPU MODE 1A, VID = 1.2375V, Ch1: PHASE, O Ch2 ...

Page 34

Typical Performance FIGURE 40. LOAD TRANSIENT RESPONSE WITH OVERSHOOT REDUCTION FUNCTION DISABLED, GPU MODE, V VID = 0.9V 12A/22A, O di/dt = “FASTEST” FIGURE 42. LOAD TRANSIENT RESPONSE WITH OVERSHOOT REDUCTION FUNCTION DISABLED, GPU MODE, V VID = ...

Page 35

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...

Page 36

Package Outline Drawing L28.4x4 28 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 9/ PIN 1 INDEX AREA TOP VIEW (3 . 20) PACKAGE BOUNDARY ( 50) TYPICAL RECOMMENDED LAND PATTERN 36 ...

Page 37

Package Outline Drawing L32.5x5E 32 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 03/09 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 3.50) ( 4.80 ) (3.70 ) TYPICAL RECOMMENDED LAND PATTERN 37 ...

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