ISL62881CHRTZ-T Intersil, ISL62881CHRTZ-T Datasheet - Page 26

• Manufacturer Part Number: ISL62881CHRTZ-T
• Description: IC REG PWM SGL PHASE 28TQFN
• Manufacturer: Intersil

Specifications of ISL62881CHRTZ-T

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 4.5 ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.0125 ~ 1.5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-VQFN
• For Use With: ISL62881CCPUEVAL2Z - EVAL BOARD ISL62881CCPU 28QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LGATEa and
Phase Node Minimize phase node copper area. Don’t let the phase node copper overlap with/getting close to other sensitive
DPRSLPVR No special consideration.
VID0~6
LGATEb
VR_ON
ISUM+
NAME
UGATE
PHASE
ISUM-
LGATE
IMON
BOOT
VSEN
VCCP
VSSP
VDD
RTN
VIN
or
Place the VSEN/RTN filter (C12, C13) in close proximity of the controller for good decoupling.
A capacitor (C16) decouples it to GND. Place it in close proximity of the controller.
Place the filter capacitor (C21) close to the CPU.
Place the current sensing circuit in general proximity of the controller.
Place C82 very close to the controller.
Place NTC thermistors R
The power stage sends a pair of VSUM+ and VSUM- signals to the controller. Run these two signal traces in parallel
fashion with decent width (>20mil).
IMPORTANT: Sense the inductor current by routing the sensing circuit to the inductor pads.
Route R
of inductor L1.
If possible, route the traces on a different layer from the inductor pad layer and use vias to connect the traces to
the center of the pads. If no via is allowed on the pad, consider routing the traces into the pads from the inside of
the inductor. The following drawings show the two preferred ways of routing current sensing traces.
A capacitor (C17) decouples it to GND. Place it in close proximity of the controller.
Use decent wide trace (>30mil). Avoid any sensitive analog signal trace from crossing over or getting close.
Run these two traces in parallel fashion with decent width (>30mil). Avoid any sensitive analog signal trace from
crossing over or getting close. Recommend routing PHASE trace to the high-side MOSFET (Q2 and Q8) source pins
instead of general phase node copper.
Run these two traces in parallel fashion with decent width (>30mil). Avoid any sensitive analog signal trace from
crossing over or getting close. Recommend routing VSSP to the low-side MOSFET (Q3 and Q9) source pins instead
of general power ground plane for better performance.
A capacitor (C22) decouples it to GND. Place it in close proximity of the controller.
No special consideration.
No special consideration.
traces. Cut the power ground plane to avoid overlapping with phase node copper.
Minimize the loop consisting of input capacitor, high-side MOSFETs and low-side MOSFETs (e.g.: C27, C33, Q2, Q8,
Q3 and Q9).
63
to the phase-node side pad of inductor L1. Route the other current sensing trace to the output side pad
26
TABLE 5. LAYOUT CONSIDERATIONS (Continued)
42
next to inductor (L1) so it senses the inductor temperature correctly.
ISL62881C, ISL62881D
ISL62881C, ISL62881D
SENSING TRACES
VIAS
INDUCTOR
CURRENT-
LAYOUT CONSIDERATION
SENSING TRACES
INDUCTOR
CURRENT-
March 8, 2010
FN7596.0