LTC1628CG-SYNC#PBF Linear Technology, LTC1628CG-SYNC#PBF Datasheet - Page 14

IC SW REG STEP-DOWN 28-SSOP

LTC1628CG-SYNC#PBF

Manufacturer Part Number
LTC1628CG-SYNC#PBF
Description
IC SW REG STEP-DOWN 28-SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1628CG-SYNC#PBF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
Adj to 0.8V
Current - Output
3A
Frequency - Switching
140kHz ~ 310kHz
Voltage - Input
3.5 ~ 30 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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APPLICATIO S I FOR ATIO
LTC1628-SYNC
The inductor value also has secondary effects. The transi-
tion to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R
inductor values (higher ∆I
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite,
molypermalloy, or Kool Mµ
independent of core size for a fixed inductor value, but it
is very dependent on inductance selected. As inductance
increases, core losses go down. Unfortunately, increased
inductance requires more turns of wire and therefore
copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, designs for surface mount are available
that do not increase the height significantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for each
controller in the LTC1628-SYNC: One N-channel MOSFET
for the top (main) switch, and one N-channel MOSFET for
the bottom (synchronous) switch.
14
U
U
L
) will cause this to occur at
®
cores. Actual core loss is
W
SENSE
U
. Lower
The peak-to-peak drive levels are set by the INTV
voltage. This voltage is typically 5V during start-up (see
EXTV
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V
(V
BV
logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
input voltage and maximum output current. When the
LTC1628-SYNC is operating in continuous mode the duty
cycles for the top and bottom MOSFETs are given by:
The MOSFET power dissipations at maximum output
current are given by:
where δ is the temperature dependency of R
is a constant inversely related to the gate drive current.
Both MOSFETs have I
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
high current efficiency generally improves with larger
MOSFETs, while for V
increase to the point that the use of a higher R
with lower C
Kool Mµ is a registered trademark of Magnetics, Inc.
IN
GS(TH)
DSS
Main Switch Duty Cycle
P
P
Synchronous Switch Duty Cycle
MAIN
SYNC
< 5V); then, sub-logic level threshold MOSFETs
CC
specification for the MOSFETs as well; most of the
< 3V) should be used. Pay close attention to the
Pin Connection). Consequently, logic-level
=
=
k V
( ) ( )( )( )
V
V
DS(ON)
RSS
V
OUT
IN
IN
IN
V
2
actually provides higher efficiency. The
IN
( )
V
I
I
, reverse transfer capacitance C
MAX
MAX
OUT
2
IN
R losses while the topside N-channel
> 20V the transition losses rapidly
( )
2
I
MAX
C
( )
1 δ
RSS
=
+
V
2
V
OUT
( )
IN
R
f
1 δ
+
DS ON
=
(
R
V
)
IN
DS ON
+
(
V
DS(ON)
IN
DS(ON)
V
IN
OUT
)
< 20V the
1628syncfa
device
and k
RSS
CC
,

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