BD9007F-E2 Rohm Semiconductor, BD9007F-E2 Datasheet - Page 13

IC REG SW 2A FLEX STEPDOWN 8-SOP

BD9007F-E2

Manufacturer Part Number
BD9007F-E2
Description
IC REG SW 2A FLEX STEPDOWN 8-SOP
Manufacturer
Rohm Semiconductor
Type
Step-Down (Buck)r
Datasheet

Specifications of BD9007F-E2

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1 ~ 35 V
Current - Output
2A
Frequency - Switching
50kHz ~ 500kHz
Voltage - Input
7 ~ 35 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-SOP
Power - Output
690mW
Output Voltage
2. 6 V
Output Current
2 A
Input Voltage
7 V to 35 V
Operating Temperature Range
- 40 C to + 105 C
Mounting Style
SMD/SMT
Duty Cycle (max)
100 %
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
BD9007F-E2TR
BD9006F, BD9006HFP, BD9007F, BD9007HFP
© 2009 ROHM Co., Ltd. All rights reserved.
www.rohm.com
2. For output capacitors having high ESR, such as electrolyte capacitor
(3)
3.For output capacitors having low ESR, such as low impedance electrolyte capacitor or OS-CON
For output capacitors that have high ESR (i.e., several Ω), the phase compensation setting procedure becomes
comparatively simple. Since the DC/DC converter application has a LC resonant circuit attached to the output, a -180˚
phase-delay occurs in that area. If ESR component is present, however a +90˚ phase-lead occurs to shift the phase
delay to -90˚. Since the phase delay should be set within 150˚, it is a very effective method but tends to increase the
ripple component of the output voltage.
(1) LC resonant circuit
According to changes in phase characteristics, due to the ESR, only one phase lead should be inserted.
For this phase lead, select either of the methods shows below:
To cancel the LC resonance, the frequency to insert the phase lead should be set close to the LC resonant frequency.
The setting above have is estimated. Consequently, the setting may be adjusted on the actual system. Furthermore, since
these characteristics vary with the layout of PCB loading conditions, precise calculations should be made on the actual system.
In order to use capacitors with low ESR (i.e., several tens of mΩ), two phase-leads should be inserted so that a -180˚phase-
delay, due to LC resonance, will be compensated. The following section shows a typical phase compensation procedure.
(1) Phase compensation with secondary phase lead
To set phase lead frequency, insert both of the phase leads close to the LC resonant frequency. According to empirical
rule, setting the phase lead frequency fZ2 with R3 and C2 lower than the LC resonant frequency fr, and the phase lead
frequency fZ1 with the R1 and C1 higher than the LC resonant frequency fr, will provide stable application conditions.
Insert Feedback Resistance in the C.
Vo
Phase lead fz =
R1
R2
Vo
fr =
At this resonance point, a-180˚
phase-delay occurs.
R1
R2
Vcc
C1
INV
2πC1R1
2π√LC
1
L
1
C1
C2
C
A
INV
[Hz]
[Hz]
R3
Vo
A
C2
FB
FB
13/17
Vo
(4)
(2) With ESR provided
Insert the R3 in integrator.
R1
R2
f
fr =
ESR
A -90˚ phase-delay occurs.
Phase lead fz =
Vcc
=
Phase lead
Phase lead
LC resonant:
frequency
2π√LC
2πR
1
L
INV
1
ESR
:fz1 =
:fz2 =
C
C
R3
fr =
R
[Hz]: Phase lead
[Hz]: Resonance
A
2πC2R3
ESR
Vo
C2
1
2πR1C1
2πR3C2
2π√LC
1
1
1
[Hz]
FB
Technical Note
2009.05 - Rev.A
[Hz]
[Hz]
[Hz]

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