EL7532IYZ Intersil, EL7532IYZ Datasheet - Page 6

IC REG 2A STEP DOWN MONO 10MSOP

EL7532IYZ

Manufacturer Part Number
EL7532IYZ
Description
IC REG 2A STEP DOWN MONO 10MSOP
Manufacturer
Intersil
Type
Step-Down (Buck)r
Datasheet

Specifications of EL7532IYZ

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 5.5 V
Current - Output
2A
Frequency - Switching
1.5MHz
Voltage - Input
2.5 ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Rohs Compliant
YES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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Applications Information
Product Description
The EL7532 is a synchronous, integrated FET 2A step-down
regulator which operates from an input of 2.5V to 5.5V. The
output voltage is user-adjustable with a pair of external
resistors.
The internally-compensated controller makes it possible to
use only two ceramic capacitors and one inductor to form a
complete, very small footprint 2A DC/DC converter.
Start-Up and Shut-Down
When the EN pin is tied to V
approximately 2.4V, the regulator begins to switch. The
output voltage is gradually increased to ensure proper
soft-start operation.
When the EN pin is connected to a logic low, the EL7532 is
in the shut-down mode. All the control circuitry and both
MOSFETs are off, and V
total input current is less than 1µA.
When the EN reaches logic HI, the regulator repeats the
start-up procedure, including the soft-start function.
PWM Operation
In the PWM mode, the P-Channel MOSFET and N-Channel
MOSFET always operate complementary. When the
PMOSFET is on and the NMOSFET off, the inductor current
increases linearly. The input energy is transferred to the
output and also stored in the inductor. When the P-Channel
MOSFET is off and the N-Channel MOSFET on, the inductor
current decreases linearly, and energy is transferred from
the inductor to the output. Hence, the average current
through the inductor is the output current. Since the inductor
and the output capacitor act as a low pass filter, the duty
cycle ratio is approximately equal to V
The output LC filter has a second order effect. To maintain
the stability of the converter, the overall controller must be
compensated. This is done with the fixed internally
compensated error amplifier and the PWM compensator.
Because the compensations are fixed, the values of input
and output capacitors are 10µF to 22µF ceramic. The
inductor is nominally 1.8µH, though 1.5µH to 2.2µH can be
used.
100% Duty Ratio Operation
EL7532 utilizes CMOS power FET's as the internal
synchronous power switches. The upper switch is a PMOS
and lower switch a NMOS. This not only saves a boot
capacitor, it also allows 100% turn-on of the upper PFET
switch, achieving V
V
V
O
O
is:
=
V
IN
(
R
L
+
r
DS ON1
O
(
close to V
OUT
)
)
×
IN
I
falls to zero. In this mode, the
O
6
, and V
IN
. The maximum achievable
IN
O
reaches
divided by V
IN
(EQ. 1)
.
EL7532
Where RL is the DC resistance on the inductor and r
the PFET on-resistance, nominal 70mΩ at room temperature
with tempco of 0.2mΩ/°C.
As the input voltage drops gradually close or even below the
preset V
condition, the upper PFET needs some minimum turn-off
time if it is turned off. This off-time is related to input/output
conditions. This makes the duty ratio appear randomly and
increases the output ripple somewhat until the 100% duty
ratio is reached. A larger output capacitor could reduce the
random-looking ripple. Users need to verify if this condition
has an adverse effect on the overall circuit if close to 100%
duty ratio is expected.
RSI/POR Function
When powering up, the open-collector Power-On-Reset
output holds low for about 100ms after V
preset voltage. When the active-HI reset signal RSI is
issued, POR goes to low immediately and holds for the
same period of time after RSI comes back to LOW. The
output voltage is unaffected. (Please refer to the timing
diagram). When the function is not used, connect RSI to
ground and leave open the pull-up resister R
The POR output also serves as a 100ms delayed Power
Good signal when the pull-up resister R
RSI pin needs to be directly (or indirectly through a resister
R
Output Voltage Selection
Users can set the output voltage of the converter with a
resister divider, which can be chosen based on Equation 2:
Component Selection
Because of the fixed internal compensation, the component
choice is relatively narrow. We recommend 10µF to 22µF
multi-layer ceramic capacitors with X5R or X7R rating for
both the input and output capacitors, and 1.5µH to 2.2µH
inductance for the inductor.
At extreme conditions (V
temperature higher than +75°C), input cap C
V
POR
5
RSI
O
V
) connected to Ground for this to function properly.
O
=
0.8
O
FIGURE 13. RSI AND POR TIMING DIAGRAM
, the converter gets into 100% duty ratio. At this
×
1
+
R
------ -
R
1
2
100ms
IN
< 3V, I
O
25ns
MIN
> 0.7A, and junction
4
O
is installed. The
reaches the
100ms
4
1
at POR pin.
is
November 2, 2007
DS(ON1)
FN7435.8
(EQ. 2)

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