LTC1735CS-1 Linear Technology, LTC1735CS-1 Datasheet - Page 19

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LTC1735CS-1

Manufacturer Part Number
LTC1735CS-1
Description
IC REG SW SYNC STEPDWN HE 16SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1735CS-1

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 6 V
Current - Output
3A
Frequency - Switching
300kHz
Voltage - Input
4 ~ 30 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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APPLICATIO S I FOR ATIO
Table 1
PGOOD PIN
DC Voltage: 0V to 0.7V
Resistor Pull-Up to
INT
Voltage Less Than INTV
Resistor to Ext Clock:
(0V to 1.5V)
The circuit shown in Figure 7 provides a power good
output and forces continuous operation. Transistor Q1
keeps the voltage at the PGOOD pin below 0.8V thus
disabling Burst Mode operation. When the window com-
parator indicates the output voltage is not within its 7.5%
window, the base of Q1 is pulled to ground and the power
good output appearing at the collector of Q2 goes low.
Figure 7. Forced Continuous Operation with Power Good Indication
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
where L1, L2, etc., are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1735-1 circuits: 1) LTC1735-1 V
2) INTV
transition losses.
1. The V
%Efficiency = 100% – (L1 + L2 + L3 + ...)
VCC
electrical characteristics which excludes MOSFET driver
(or Other DC
CC
IN
current is the DC supply current given in the
current, 3) I
PGOOD
PIN 4
CC
U
)
470k
2
CONDITION
No Power Good Indication
Burst Mode Operation Disabled/Forced
Continuous Current Reversal Enabled
Power Good Indication
Burst Mode, No Current Reversal
When Power is Good
No Power Good Indication
Burst Mode Operation Disabled
No Current Reversal
R losses, 4) Topside MOSFET
INTV
U
Q1
CC
100k
Q2
10k
1735-1 F07
W
POWER
GOOD
IN
U
current,
2. INTV
3. I
4. Transition losses apply only to the topside MOSFET(s),
and control currents. V
(< 0.1%) loss that increases with V
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
out of INTV
control circuit current. In continuous mode, I
f(Q
topside and bottom-side MOSFETs.
By powering EXTV
other high efficiency source), the additional V
resulting from the driver and control currents will be
scaled by a factor of (Duty Cycle)/(Efficiency). For
example, in a 15V to 1.8V application, 10mA of INTV
current results in approximately 1.2mA of V
This reduces the midcurrent loss from 10% or more (if
the driver was powered directly from V
percent.
MOSFETs, inductor and current shunt. In continuous
mode, the average output current flows through L and
R
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same R
the resistance of one MOSFET can simply be summed
with the resistances of L and R
losses. For example, if each R
0.03 , and R
0.06 . This results in losses ranging from 3% to 17%
as the output current increases from 1A to 5A for a 1.8V
output, or 4% to 20% for a 1.5V output. Efficiency
varies as the inverse square of V
external components and power level. I
the efficiency to drop at high output currents.
and only become significant when operating at high
input voltages (typically 12V or greater). Transition
losses can be estimated from:
2
SENSE
R losses are predicted from the DC resistances of the
Transition Loss = (1.7) V
T
+ Q
CC
, but is “chopped” between the topside main
B
current is the sum of the MOSFET driver and
), where Q
CC
CC
to ground. The resulting dQ/dt is a current
SENSE
that is typically much larger than the
CC
T
= 0.01 , then the total resistance is
and Q
from an output-derived source (or
IN
B
current results in a small
IN
are the gate charges of the
2
I
DS(ON)
O(MAX)
LTC1735-1
SENSE
IN
OUT
.
IN
2
= 0.02 , R
C
R losses cause
) to only a few
to obtain I
for the same
RSS
DS(ON)
IN
GATECHG
IN
f
current.
19
current
, then
L
2
CC
R
=
=

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