LTC1735CS-1 Linear Technology, LTC1735CS-1 Datasheet - Page 20

• Manufacturer Part Number: LTC1735CS-1
• Description: IC REG SW SYNC STEPDWN HE 16SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1735CS-1

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 6 V
• Current - Output: 3A
• Frequency - Switching: 300kHz
• Voltage - Input: 4 ~ 30 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

LTC1735-1
APPLICATIO S I FOR ATIO
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses in the
design of a system. The internal battery and fuse resistance
losses can be minimized by making sure that C
adequate charge storage and a very low ESR at the
switching frequency. A 25W supply will typically require
a minimum of 20 F to 40 F of capacitance having a
maximum of 0.01
including Schottky conduction losses during dead-time
and inductor core losses generally account for less than
2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V
amount equal to I
series resistance of C
discharge C
forces the regulator to adapt to the current change and
return V
time V
ringing, which would indicate a stability problem.
OPTI-LOOP compensation allows the transient response
to be optimized over a wide range of output capacitance
and ESR values. The availability of the I
allows optimization of control loop behavior but also
provides a DC coupled and AC filtered closed-loop response
test point. The DC step, rise time and settling at this test
point truly reflects the closed loop response. Assuming a
predominantly second order system, phase margin and/or
damping factor can be estimated using the percentage of
overshoot seen at this pin. The bandwidth can also be
estimated by examining the rise time at the pin. The I
external components shown in the Figure 1 circuit will
provide an adequate starting point for most applications.
The I
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and the
particular output capacitor type and value have been
20
TH
OUT
OUT
series R
can be monitored for excessive overshoot or
OUT
to its steady-state value. During this recovery
generating the feedback error signal that
C
-C
LOAD
U
C
OUT
filter sets the dominant pole-zero
to 0.02
(ESR), where ESR is the effective
. I
U
LOAD
also begins to charge or
of ESR. Other losses
W
OUT
TH
pin not only
shifts by an
U
IN
has
TH
determined. The output capacitors need to be decided
upon because the various types and values determine the
loop feedback factor gain and phase. An output current
pulse of 20% to 100% of full load current having a rise time
of 1 s to 10 s will produce output voltage and I
waveforms that will give a sense of the overall loop
stability without breaking the feedback loop. The initial
output voltage step may not be within the bandwidth of the
feedback loop, so the standard second order overshoot/
DC ratio cannot be used to determine phase margin. The
gain of the loop will be increased by increasing R
bandwidth of the loop will be increased by decreasing C
If R
the zero frequency will be kept the same, thereby keeping
the phase shift the same in the most critical frequency
range of the feedback loop. The output voltage settling
behavior is related to the stability of the closed-loop
system and will demonstrate the actual overall supply
performance. For a detailed explanation of optimizing the
compensation components, including a review of control
loop theory, refer to Application Note 76.
Improve Transient Response and Reduce Output
Capacitance with Active Voltage Positioning
Fast load transient response, limited board space and low
cost are normal requirements of microprocessor power
supplies. Active voltage positioning improves transient
response and reduces the output capacitance required to
power a microprocessor where a typical load step can be
from 0.2A to 15A in 100ns or 15A to 0.2A in 100ns. The
voltage at the microprocessor must be held to about
Since the control loop cannot respond this fast, the output
capacitors must supply the load current until the control
loop can respond. Capacitor ESR and ESL primarily deter-
mine the amount of droop or overshoot in the output
voltage. Normally, several capacitors in parallel are re-
quired to meet microprocessor transient requirements.
Active voltage positioning is a form of deregulation. It
sets the output voltage high for light loads and low for
heavy loads. When load current suddenly increases, the
output voltage starts from a level higher than nominal so
the output voltage can droop more and stay within the
specified voltage range. When load current suddenly
0.1V of nominal in spite of these load current steps.
C
is increased by the same factor that C
C
is decreased,
C
and the
TH
pin
C
.