L6730C STMicroelectronics, L6730C Datasheet - Page 22

IC CTRLR ADJ STPDN SYNC 20-TSSOP

L6730C

Manufacturer Part Number
L6730C
Description
IC CTRLR ADJ STPDN SYNC 20-TSSOP
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of L6730C

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
Adj to 0.6V
Frequency - Switching
100kHz ~ 1MHz
Voltage - Input
1.8 ~ 14 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP Exposed Pad, 20-eTSSOP, 20-HTSSOP
Package
HTSSOP20, QFN4x4 24L
For Use With
497-5868 - EVAL BOARD 30A 400KHZ L6730497-5501 - EVAL BOARD FOR L6730XX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Power - Output
-
Device description
Figure 15. OVP with sink disabled: delay on the OVP operation.
22/50
The L6730D can always sink current and so the OVP will operate always in advance. The
device realizes the over-current-protection (OCP) sensing the current both on the high-side
MOSFET(s) and the low-side MOSFET(s) and so 2 current limit thresholds can be set (see
OCH pin and OCL pin in
The Peak Current Protection is active when the high-side MOSFET(s) is turned on, after an
adjustable masking time (see
enabled when the low-side MOSFET(s) is turned on after a fix masking time of about 400ns. If,
when the soft-start phase is completed, an over current event occurs during the on time (peak-
current-protection) or during the off time (valley-current-protection) the device enters in
HICCUP mode (L6730C): the high-side and low-side MOSFET(s) are turned off, the soft-start
capacitor is discharged with a constant current of 10µA and when the voltage at the SS pin
reaches 0.5V the soft-start phase restarts. During the soft-start phase the OCP provides a
constant-current-protection. If during the T
high-side MOSFET(s) is immediately turned-off (after the masking time and the internal delay)
and returned-on at the next pwm cycle. The limit of this protection is that the Ton can’t be less
than masking time plus propagation delay (see
page
very hard short circuit, even with this short T
protection is very helpful in this case to limit the current. If during the off-time the OCL
comparator triggers an over current, the high-side MOSFET(s) is not turned-on until the current
is over the valley-current-limit. This implies that, if it is necessary, some pulses of the high-side
MOSFET(s) will be skipped, guaranteeing a maximum current due to the following formula:
In constant current protection a current control loop limits the value of the error amplifier’s
output (comp), in order to avoid its saturation and thus recover faster when the output returns in
regulation.
persists also in the soft-start phase.
Peak Current Limit
Valley Current Limit
25) because during the masking time the peak-current-protection is disabled. In case of
Figure 16.
I
MAX
shows the behaviour of the device during an over current condition that
Table 3: Pins
I
VALLEY
Chapter 5.10 on page
Vin
connection):
ON
L
126%
Vout
ON
the OCH comparator triggers an over current the
, the current could escalate. The valley-current-
Chapter 5.9: Adjustable masking time on
T
ON
25). The valley-current-protection is
,
MIN
(4)
V
LGate
V
L6730C - L6730D
OUT
FB

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