KSZ8695PX Micrel Inc, KSZ8695PX Datasheet - Page 20

• Manufacturer Part Number: KSZ8695PX
• Description: IC SWITCH 10/100 1PORT 289PBGA
• Manufacturer: Micrel Inc

Specifications of KSZ8695PX

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 289-PBGA
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 289
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: KSZ8695PX-EVAL - EVAL KIT EXPERIMENT ONLY KSZ8695
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1024

KS8695PX
Memory Interface
The KS8695PX has a glueless interface for SDRAM and
static memory, i.e. ROM, SRAM, and Flash. It supports up
to two banks of static memory (Figure 7), up to two banks of
SDRAM (Figure 8), and three banks of external I/O (Figure
9). The total address space for the KS8695PX is 64MB.
This includes SDRAM, static memory, external I/O, and the
KS8695PX's own 64KB of register space.
The memory interface for the SDRAM and static memory has
a special automatic address mapping feature. This allows the
designer to connect address bit 0 on the memory to ADDR[0]
on the KS8695PX and address bit 1 on the memory to ADDR[1]
on the memory, regardless of whether the designer is trying
to achieve word, half word, or byte addressing.
The KS8695PX memory controller performs the address
mapping internally. This permits the designer to use the
maximum amount of address bits, instead of losing one
or two bits because of address mapping. For external I/O,
however, the designer still needs to take care of the address
mapping (see Figure 9).
M9999-091605
Figure 7. Static Memory Interface Examples
KS8695PX
KS8695PX
ADDR[21:2]
ADDR[21:2]
DATA[15:0]
DATA[7:0]
ERWEN0
ERWEN0
EROEN
EROEN
RCSN0
ADDR0
RCSN0
ADDR0
ADDR1
ADDR1
V DD
20
20
16
8
A0
A1
A[21:2]
D[7:0]
CE
OE
WE
A0
A1
A[21:2]
D[15:0]
CE
OE
WE
BYTE
Half Word Wide
Static Memory
Static Memory
Byte Wide
20
KS8695PX
KS8695PX
Figure 8. SDRAM Interface Examples
ADDR[21..20]
ADDR[21..20]
ADDR[12..0]
ADDR[11..0]
DATA[15..0]
DATA[31..0]
SDQM[3..0]
SDOCLK
SDRASN
SDCASN
SDOCLK
SDRASN
SDCASN
SDCSN0
SDCSN0
SDQM0
SDQM1
SDWEN
SDWEN
SDICLK
SDICLK
SDCKE
SDCKE
16
32
13
12
4
2
2
CLK
CKE
DQ[15..0]
A[12..0]
BA[1..0]
CS#
RAS#
CAS#
LDQM
WE#
CLK
CKE
DQ[31..0]
A[11..0]
BA[1..0]
CS#
RAS#
CAS#
DQM[3..0]
WE#
UDQM
Half Word Wide
September 2005
Word Wide
16M x 16
SDRAM
SDRAM
4M x 32
Micrel