KSZ8695PX Micrel Inc, KSZ8695PX Datasheet - Page 6

• Manufacturer Part Number: KSZ8695PX
• Description: IC SWITCH 10/100 1PORT 289PBGA
• Manufacturer: Micrel Inc

Specifications of KSZ8695PX

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 289-PBGA
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 289
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: KSZ8695PX-EVAL - EVAL KIT EXPERIMENT ONLY KSZ8695
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1024

KS8695PX
M9999-091605
Pin Description
Signal List Alphabetized by Name
Note:
1. Gnd = Ground.
Pin Number
Pin Number
Pin Number
Pin Number
O = Output.
I/O = Bidirectional.
D14
D14
D14
D14
D14
B10
B10
B10
B10
B10
U15
U15
U15
U15
U15
U12
U12
U12
U12
U12
A11
A11
A11
A11
A11
T15
T15
T15
T15
T15
T12
T12
T12
T12
T12
M1
M1
M1
M1
M1
M2
M2
M2
M2
M2
M3
M3
M3
M3
M3
U4
U4
U4
U4
U4
R3
R3
R3
R3
R3
P1
P1
P1
P1
P1
P2
P2
P2
P2
P2
N1
N1
N1
N1
N1
N2
N2
N2
N2
N2
N3
N3
N3
N3
N3
N4
N4
N4
N4
N4
U3
U3
U3
U3
U3
P3
P3
P3
P3
P3
P4
P4
P4
P4
P4
U2
U2
U2
U2
U2
U1
U1
U1
U1
U1
R1
R1
R1
R1
R1
R2
R2
R2
R2
R2
E3
E3
E3
E3
E3
H7
H7
H7
H7
H7
K7
K7
K7
K7
K7
B9
B9
B9
B9
B9
A6
A6
A6
A6
A6
T4
T4
T4
T4
T4
T3
T3
T3
T3
T3
T1
T1
T1
T1
T1
T2
T2
T2
T2
T2
L7
L7
L7
L7
L7
J7
J7
J7
J7
J7
ADDR20/BA0
ADDR20/BA0
ADDR20/BA0
ADDR20/BA0
ADDR20/BA0
ADDR2/BA1
ADDR2/BA1
ADDR2/BA1
ADDR2/BA1
ADDR2/BA1
CLKRUNN
CLKRUNN
CLKRUNN
CLKRUNN
CLKRUNN
Pin Name
Pin Name
Pin Name
Pin Name
ADDR10
ADDR10
ADDR10
ADDR10
ADDR10
ADDR12
ADDR12
ADDR12
ADDR12
ADDR12
ADDR13
ADDR13
ADDR13
ADDR13
ADDR13
ADDR14
ADDR14
ADDR14
ADDR14
ADDR14
ADDR15
ADDR15
ADDR15
ADDR15
ADDR15
ADDR16
ADDR16
ADDR16
ADDR16
ADDR16
ADDR17
ADDR17
ADDR17
ADDR17
ADDR17
ADDR18
ADDR18
ADDR18
ADDR18
ADDR18
ADDR19
ADDR19
ADDR19
ADDR19
ADDR19
ADDR11
ADDR11
ADDR11
ADDR11
ADDR11
DATA10
DATA10
DATA10
DATA10
DATA10
DATA11
DATA11
DATA11
DATA11
DATA11
ADDR0
ADDR0
ADDR0
ADDR0
ADDR0
ADDR1
ADDR1
ADDR1
ADDR1
ADDR1
ADDR2
ADDR2
ADDR2
ADDR2
ADDR2
ADDR3
ADDR3
ADDR3
ADDR3
ADDR3
ADDR4
ADDR4
ADDR4
ADDR4
ADDR4
ADDR5
ADDR5
ADDR5
ADDR5
ADDR5
ADDR6
ADDR6
ADDR6
ADDR6
ADDR6
ADDR7
ADDR7
ADDR7
ADDR7
ADDR7
ADDR8
ADDR8
ADDR8
ADDR8
ADDR8
ADDR9
ADDR9
ADDR9
ADDR9
ADDR9
CBEN0
CBEN0
CBEN0
CBEN0
CBEN0
CBEN1
CBEN1
CBEN1
CBEN1
CBEN1
CBEN2
CBEN2
CBEN2
CBEN2
CBEN2
CBEN3
CBEN3
CBEN3
CBEN3
CBEN3
DATA0
DATA0
DATA0
DATA0
DATA0
DATA1
DATA1
DATA1
DATA1
DATA1
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
Type
Type
Type
Type
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
(1)
Pin Function
Pin Function
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit
Address Bit
Address Bit
Address Bit
Address Bit
Address Bit/Bank Address Bit 0 for SDRAM Interface.
Address Bit/Bank Address Bit 0 for SDRAM Interface.
Address Bit/Bank Address Bit 0 for SDRAM Interface.
Address Bit/Bank Address Bit 0 for SDRAM Interface.
Address Bit/Bank Address Bit 0 for SDRAM Interface.
Address Bit/Bank Address Bit 1 for SDRAM Interface.
Address Bit/Bank Address Bit 1 for SDRAM Interface.
Address Bit/Bank Address Bit 1 for SDRAM Interface.
Address Bit/Bank Address Bit 1 for SDRAM Interface.
Address Bit/Bank Address Bit 1 for SDRAM Interface.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Address Bit.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
Analog Signal Ground.
PCI Commands and Byte Enable 0. Active Low.
PCI Commands and Byte Enable 0. Active Low.
PCI Commands and Byte Enable 0. Active Low.
PCI Commands and Byte Enable 0. Active Low.
PCI Commands and Byte Enable 0. Active Low.
PCI Commands and Byte Enable 1. Active Low.
PCI Commands and Byte Enable 1. Active Low.
PCI Commands and Byte Enable 1. Active Low.
PCI Commands and Byte Enable 1. Active Low.
PCI Commands and Byte Enable 1. Active Low.
PCI Commands and Byte Enable 2. Active Low.
PCI Commands and Byte Enable 2. Active Low.
PCI Commands and Byte Enable 2. Active Low.
PCI Commands and Byte Enable 2. Active Low.
PCI Commands and Byte Enable 2. Active Low.
PCI Commands and Byte Enable 3. Active Low.
PCI Commands and Byte Enable 3. Active Low.
PCI Commands and Byte Enable 3. Active Low.
PCI Commands and Byte Enable 3. Active Low.
PCI Commands and Byte Enable 3. Active Low.
Cardbus Clock Run Request Signal. Active Low.
Cardbus Clock Run Request Signal. Active Low.
Cardbus Clock Run Request Signal. Active Low.
Cardbus Clock Run Request Signal. Active Low.
Cardbus Clock Run Request Signal. Active Low.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
External Data Bit.
6
September 2005
Micrel