AD9267BCPZ Analog Devices Inc, AD9267BCPZ Datasheet - Page 23

• Manufacturer Part Number: AD9267BCPZ
• Description: IC MOD SIGMA-DELTA DUAL 64LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9267BCPZ

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Resolution (bits): 16bit
• Sampling Rate: 640MSPS
• Input Channel Type: Differential
• Data Interface: Serial, SPI
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MEMORY MAP
Table 16. Memory Map
Register
SPI Port Config
Chip ID
Chip Grade
Channel Index
Power Modes
PLLENABLE
PLL
Output Modes
Output Adjust
Output Clock
Reference
Overrange
MEMORY MAP DEFINITIONS
Table 17. Memory Map Definitions
Register
SPI Port Config
Chip ID
Chip Grade
Channel Index
Power Modes
PLLENABLE
PLL
Output Modes
Output Adjust
Output Clock
Reference
Overrange
Address (Hex)
00
01
02
05
08
09
0A
14
15
16
18
111
Address
0x00
0x01
0x02
0x05
0x08
0x09
0x0A
0x14
0x15
0x16
0x18
0x111
Bit Name
SOFTRESET
CHIPID
Channel
PWRDWN
PLLENABLE
PLLLOCKED
PLLAUTO
PLLMULT
DRVSTD
OUTENB
LVDSTERM
DCOINV
AUTORST
OR_IND1
OR_IND2
LSBFIRST
CHILDID
EXTREF
Bit 7
0
PLLLOCKED
DRVSTD
DCOINV
AUTORST
Bit 6
LSBFIRST
PLLAUTO
EXTREF
OR_IND1
Bit(s)
[6], [1]
[5], [2]
[7:0]
5:4]
[1:0]
[1:0]
[2]
[7]
[6]
[5:0]
[7]
[4]
[5:4]
[7]
[6]
[7]
[6]
[5]
Rev. 0 | Page 23 of 24
Bit 5
SOFTRESET
OR_IND2
Default
0
0
0x22
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
LVDSTERM[1:0]
CHILDID[1:0]
Description
0: serial interface uses MSB-first format
1: serial interface uses LSB-first format
1: default all serial registers except 0x00, 0x09, and 0x0A
0x22: AD9267
0x10: 5 MHz bandwidth
0x20: 2.5 MHz bandwidth
0x30: modulator only
0x1: Channel A only addressed
0x2: Channel B only addressed
0x3: both channels addressed simultaneously
0x0: normal operation
0x1: channel power-down (local)
0x2: standby (everything except reference circuits)
0x3: sleep
1: enable PLL
0: PLL is not locked
1: PLL is locked
1: enable PLL auto band select
See
1: Low power (IEEE1596.3 similar)
0: no termination
1: 200 Ω
2: 100 Ω
3: 100 Ω
1: invert DCO±
1: enable autoreset
See
See
0x00: 10 MHz bandwidth
0: disable PLL auto band select
0: ANSI-644
1: Channel A and Channel B outputs tristated
1: use external reference
Bit 4
1
OUTENB
CHIPID[7:0]
Table 8
Table 12
Table 12
Bit 3
1
PLLMULT[5:0]
Bit 2
SOFTRESET
PLLENABLE
Bit 1
LSBFIRST
PWRDWN[1:0]
Channel[1:0]
AD9267
Bit 0
0