IDT89HPES48T12ZABR IDT, Integrated Device Technology Inc, IDT89HPES48T12ZABR Datasheet - Page 17

• Manufacturer Part Number: IDT89HPES48T12ZABR
• Description: IC PCI SW 48LANE 12PORT 1156BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89HPES48T12ZABR

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Package Type: FCBGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 89HPES48T12ZABR

IDT 89PES48T12 Data Sheet
JTAG
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST_N
1.
es from 0 to 1. Otherwise, a race may occur if JTAG_TRST_N is deasserted (going from low to high) on a rising edge of JTAG_TCK when
JTAG_TMS is low, because the TAP controller might go to either the Run-Test/Idle state or stay in the Test-Logic-Reset state.
2.
The JTAG specification, IEEE 1149.1, recommends that JTAG_TMS should be held at 1 while the signal applied at JTAG_TRST_N chang-
The values for this symbol were determined by calculation, not by testing.
Signal
JTAG_TRST_N
1
,
JTAG_TMS
JTAG_TDO
JTAG_TCK
JTAG_TDI
Thigh_16a,
Symbol
Tpw_16d
Tper_16a
Tlow_16a
Tdz_16c
Thld_16b
Tsu_16b
Tdo_16c
2
2
Tpw_16d
Table 12 JTAG AC Timing Characteristics
Figure 6 JTAG AC Timing Waveform
JTAG_TCK falling
JTAG_TCK rising
Reference
Tsu_16b
Tsu_16b
Edge
Thld_16b
Thld_16b
Thigh_16a
none
none
17 of 46
Min
25.0
10.0
25.0
2.4
1.0
—
—
Tlow_16a
Tlow_16a
Tdo_16c
Max
50.0
25.0
11.3
11.3
—
—
—
Tper_16a
Unit
ns
ns
ns
ns
ns
ns
ns
Tdz_16c
Reference
See Figure 6.
Diagram
Timing
December 21, 2006