FOD8001 Fairchild Optoelectronics Group, FOD8001 Datasheet
FOD8001
Specifications of FOD8001
Related parts for FOD8001
FOD8001 Summary of contents
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... Pin 3 must be left unconnected ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 Description The FOD8001 is a 3.3V/5V high-speed logic gate Optocoupler, which supports isolated communications allowing digital signals to communicate between sys- tems without conducting ground loops or hazardous voltages. It utilizes Fairchild’s patented coplanar packag- ...
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... Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected to conditions outside these ratings. 4. 0.1µF bypass capacitor must be connected between Pin 1 and 4, and 5 and 8. ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 Pin Function Description Input Supply Voltage Input Data LED Anode – ...
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... Logic High Output Supply DD2H Current V Logic High Output Voltage OH VOL Logic Low Output Voltage ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 (Apply over all recommended conditions, typical value is measured at T Test Conditions ≤ 10µ 60Hz 1.0 min, I I-O ( 500V I-O ...
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... Unloaded dynamic power dissipation is calculated as follows where f is switched time in MHz ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 (Apply over all recommended conditions, typical value is measured at = +5.0V +5.0V and V DD2 DD1 Test Conditions C = 15pF 15pF ...
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... V = 3.3V DD1 DD2 7.0 6.5 6.0 5.5 -40 - Ambient Temperature (°C) A ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 Figure 2. Input Voltage Switching Threshold vs. Input Supply Voltage 2.0 V DD2 1.8 1.6 1.4 1.2 1 3.0 Figure 4. Pulse Width Distortion vs. Ambient Temperature 4.0 Frequency = 12.5MHz ...
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... T = 25° -40°C A 4.0 3.5 3.0 0 2000 4000 6000 f - Frequency (kHz) ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 (Continued) Figure 8. Typical Width Distortion vs. Output Load Capacitance 2.6 Frequency = 12.5MHz Duty Cycle = 50 2.4 DD1 2.2 2.0 1.8 1.6 1.4 1.2 1.0 ...
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... DD1 Pulse width = 40ns Duty Cycle = 50% Figure 13. Test Circuit for Propogation Delay Time and Rise Time, Fall Time 3.3V DD1 Figure 14. Test Circuit for Instantaneous Common Mode Rejection Voltage ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 1 0.1µ PLH Input V ...
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... The necessary tests have been conducted to understand the influence of the power supply noise and its effect of the proper operation of the FOD8001. The optocoupler under test offered power supply noise rejection in excess of 10% of the supply voltage for a frequency ranging from 100kHz to 35MHz, for logic high and logic low states ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 0.164 (4.16) 0.144 (3.66) 0.202 (5.13) 0.182 (4.63) ...
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... Marking Information Definitions ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 8.0 ± 0.10 2.0 ± 0.05 4.0 ± 0.10 6.40 ± 0.20 Small outline 8-pin, shipped in tubes (50 units per tube) Small outline 8-pin, tape and reel (2,500 units per reel) 1 8001 ...
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... Temperature 160 (°C) 140 120 100 ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 260°C Time above 183° Sec 1.822°C/Sec Ramp up rate 33 Sec 60 120 180 270 Time (s) 11 >245° Sec 360 www.fairchildsemi.com ...
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... Datasheet Identification Product Status Advance Information Formative / In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production ©2008 Fairchild Semiconductor Corporation FOD8001 Rev. 1.0.3 ® PowerTrench PowerXS™ SM Programmable Active Droop™ ® QFET QS™ Quiet Series™ RapidConfigure™ ...