HCPL-J314 Avago Technologies US Inc., HCPL-J314 Datasheet - Page 13

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HCPL-J314

Manufacturer Part Number
HCPL-J314
Description
OPTOCOUPLER 1CH 0.6A 8-DIP
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of HCPL-J314

Package / Case
8-DIP (0.300", 7.62mm)
Voltage - Isolation
3750Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
600mA
Propagation Delay High - Low @ If
300ns @ 8mA
Current - Dc Forward (if)
25mA
Input Type
DC
Output Type
Push-Pull, Totem-Pole
Mounting Type
Through Hole
Isolation Voltage
3750 Vrms
Maximum Fall Time
50 ns
Maximum Forward Diode Current
25 mA
Maximum Rise Time
50 ns
Minimum Forward Diode Voltage
1.2 V
Output Device
Integrated Photo IC
Configuration
1 Channel
Maximum Forward Diode Voltage
1.8 V
Maximum Reverse Diode Voltage
3 V
Maximum Power Dissipation
260 mW
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Selecting the Gate Resistor (Rg)
Step 1: Calculate R
cation. The IGBT and Rg in Figure 19 can be analyzed as
a simple RC circuit with a voltage supplied by the HCPL-
J314.
Rg ≥ ————
The V
at the peak current of 0.6A. (See Figure 6).
Step 2: Check the HCPL-J314 power dissipation and in-
crease Rg if necessary. The HCPL-J314 total power dissi-
pation (P
and the output power (P
P
P
P
= (I
where K
ing and K
circuit in Figure 19 with I
Ω, Max Duty Cycle = 80%, Qg = 100 nC, f = 20 kHz and
T
P
P
The value of 3 mA for I
max. I
Since P
right for the power dissipation.
13
AMAX
E
O
E
O
T
= P
= (3 mA + (0.001 mA/(nC 6 kHz)) 6 20 kHz 6 100 nC) 6
= I
= 10 mA 6 1.8 V 6 0.8 = 14 mW
= P
F
OL
CCBIAS
= ————
= 32 Ω
CC
E
= 85°C:
O(BIAS)
6 V
+ P
V
I
24 V – 5 V
< 260 mW (P
O
value of 5 V in the previous equation is the V
ICC
over entire operating temperature range.
for this case is less than P
24 V + 0.4 µJ 6 20 kHz = 80 mW
T
F
ICC
CC
) is equal to the sum of the emitter power (P
OLPEAK
6 Duty Cycle
O
6 Qg 6 f is the increase in I
+ K
0.6A
+ P
is a constant of 0.001 mA/(nC*kHz). For the
– V
ICC
O(SWITCHING)
OL
g
6 Qg 6 f) 6 V
minimum from the I
O(MAX)
CC
F
O
in the previous equation is the
(worst case) = 10 mA, Rg = 32
).
= I
@ 85°C)
CC
CC
+ E
6 V
O(MAX)
SW
CC
CC
(Rg,Qg) 6 f
+ E
due to switch-
OL
, Rg = 32 Ω is all
SW
peak specifi-
(Rg,Qg) 6 f
OL
E
)
LED Drive Circuit Considerations for Ultra High CMR Perfor-
mance
Without a detector shield, the dominant cause of op-
tocoupler CMR failure is capacitive coupling from the
input side of the optocoupler, through the package, to
the detector IC as shown in Figure 21. The HCPL-J314
improves CMR performance by using a detector IC with
an optically transparent Faraday shield, which diverts the
capacitively coupled current away from the sensitive IC
circuitry. However, this shield does not eliminate the ca-
pacitive coupling between the LED and optocoupler pins
5-8 as shown in Figure 22. This capacitive coupling causes
perturbations in the LED current during common mode
transients and becomes the major source of CMR failures
for a shielded optocoupler. The main design objective of
a high CMR LED drive circuit becomes keeping the LED in
the proper state (on or off ) during common mode tran-
sients. For example, the recommended application circuit
(Figure 19), can achieve 10 kV/µs CMR while minimizing
component complexity.
Techniques to keep the LED in the proper state are
discussed in the next two sections.
Figure 20. Energy dissipated in the HCPL-J314 and for
each IGBT switching cycle.
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
Rg – GATE RESISTANCE – Ω
20
40
60
Qg = 50 nC
Qg = 100 nC
Qg = 200 nC
Qg = 400 nC
80
100

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