SMS01GDFB5E NUMONYX, SMS01GDFB5E Datasheet - Page 13
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SMS01GDFB5E
Manufacturer Part Number
SMS01GDFB5E
Description
MICROSD CARD SMS 1GB FLASH MEM
Manufacturer
NUMONYX
Datasheet
1.SMS512DFA5E.pdf
(60 pages)
Specifications of SMS01GDFB5E
Memory Size
1GB
Memory Type
SD (Secure Digital)
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SMSxxxDF
3.1
Secure digital memory card bus topology
The secure digital memory card system defines two alternative communications protocols:
SD and SPI that correspond to two operating modes.
Either mode can be selected in the application, mode selection is transparent to the host.
The host automatically detects the operating mode of the card by issuing the Reset
command (refer to
to use the same mode. Therefore, applications that use only one communication mode do
not have to be aware of the other.
The SD bus includes the following signals:
The SD memory card bus has a synchronous star topology (refer to
memory card system bus
(the cards). The Clock, power and ground signals are common to all cards. The command
(CMD) and data (DAT0 - DAT3) signals are dedicated to the cards, they provide continuous
point-to-point connection to all the cards.
During the initialization process, commands are sent to each card individually, allowing the
application to detect the cards and assign logical addresses to the physical slots. Data is
always sent (received) to (from) each card individually. However, in order to simplify the
handling of the card stack, after the initialization process, all commands may be sent
concurrently to all cards. Addressing information is provided in the command packet.
The SD bus allows dynamic configuration of the number of data lines. After power-up the SD
memory card defaults to using only DAT0 for data transfer. After initialization the host can
change the bus width (number of active data lines). This feature is an easy trade off between
hardware cost and system performance.
CLK: host to card clock signal
CMD: bi-directional command/response signal
DAT0 - DAT3: 4 bi-directional data signals.
V
DD
, V
SS1
, V
SS2
Section 7.2.1: Mode
: power and ground signals.
topology) with a single master (the application) and multiple slaves
selection) and will expect all further communications
Secure digital memory card interface
Figure 4: Secure digital
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