DS1922T-F5# Maxim Integrated Products, DS1922T-F5# Datasheet - Page 42

• Manufacturer Part Number: DS1922T-F5#
• Description: IBUTTON TEMP LOGGER
• Manufacturer: Maxim Integrated Products
• Series: iButton®r

Specifications of DS1922T-F5#

• Rohs Information: IButton RoHS Compliance Plan
• Memory Size: 512B
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Temperature Logger iButton with 8KB
Data-Log Memory
For a write-one time slot, the voltage on the data line
must have crossed the V
low time t
the voltage on the data line must stay below the V
threshold until the write-zero low time t
The voltage on the data line should not exceed V
during the entire t
threshold has been crossed, the DS1922L/DS1922T need
a recovery time t
time slot.
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below V
until the read low time t
window, when responding with a 0, the DS1922L/
DS1922T start pulling the data line low; their internal
timing generator determines when this pulldown ends
and the voltage starts rising again. When responding
with a 1, the DS1922L/DS1922T do not hold the data
line low at all, and the voltage starts rising as soon as
t
The sum of t
nal timing generator of the DS1922L/DS1922T on the
other side define the master sampling window (t
to t
from the data line. For most reliable communication, t
should be as short as permissible and the master
should read close to but no later than t
reading from the data line, the master must wait until
t
time t
next time slot.
In a 1-Wire environment line termination is possible
only during transients controlled by the bus master
(1-Wire driver). 1-Wire networks, therefore, are suscep-
tible to noise of various origins. Depending on the
physical size and topology of the network, reflections
from end points and branch points can add up or can-
cel each other to some extent. Such reflections are vis-
ible as glitches or ringing on the 1-Wire communication
42
RL
SLOT
MSRMAX
is over.
______________________________________________________________________________________
REC
is expired. This guarantees sufficient recovery
W1LMAX
for the DS1922L/DS1922T to get ready for the
Improved Network Behavior
) in which the master must perform a read
RL
+ δ (rise time) on one side and the inter-
(Switchpoint Hysteresis)
REC
is expired. For a write-zero time slot,
W0L
before they are ready for the next
TH
or t
RL
threshold before the write-one
W1L
is expired. During the t
window. After the V
W0LMIN
Slave-to-Master
Master-to-Slave
MSRMAX
is expired.
MSRMIN
. After
ILMAX
TH
TH
RL
RL
TL
line. Noise coupled onto the 1-Wire line from external
sources can also result in signal glitching. A glitch dur-
ing the rising edge of a time slot can cause a slave
device to lose synchronization with the master and, as
a consequence, result in a search ROM command
coming to a dead end or cause a device-specific func-
tion command to abort. For better performance in net-
work applications, the DS1922L/DS1922T use a new
1-Wire front-end, which makes them less sensitive to
noise and also reduces the magnitude of noise inject-
ed by the slave device itself.
The DS1922L/DS1922T’s 1-Wire front-end differs from
traditional slave devices in four characteristics:
1) The falling edge of the presence pulse has a con-
2) There is additional lowpass filtering in the circuit that
3) There is a hysteresis at the low-to-high switching
4) There is a time window specified by the rising edge
Devices that have the parameters t
specified in their electrical characteristics use the
improved 1-Wire front-end.
trolled slew rate. This provides a better match to the
line impedance than a digitally switched transistor,
converting the high-frequency ringing known from
traditional devices into a smoother low-bandwidth
transition. The slew-rate control is specified by the
parameter t
dard and overdrive speed.
detects the falling edge at the beginning of a time
slot. This reduces the sensitivity to high-frequency
noise. This additional filtering does not apply at over-
drive speed.
threshold V
does not go below V
(Figure 14, Case A). The hysteresis is effective at
any 1-Wire speed.
hold-off time t
even if they extend below V
(Figure 14, Case B, t
droops or glitches that appear late after crossing the
V
cannot be filtered out and are taken as the begin-
ning of a new time slot (Figure 14, Case C, t
t
REH
TH
).
threshold and extend beyond the t
TH
FPD
REH
. If a negative glitch crosses V
, which has different values for stan-
during which glitches are ignored,
TH
GL
- V
< t
HY
, it is not recognized
REH
TH
FPD
). Deep voltage
- V
, V
HY
HY
REH
, and t
threshold
window
TH
GL
REH
but
≥