MT18VDDT12872AG-40BF1 Micron Technology Inc, MT18VDDT12872AG-40BF1 Datasheet - Page 17
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MT18VDDT12872AG-40BF1
Manufacturer Part Number
MT18VDDT12872AG-40BF1
Description
MODULE DDR SDRAM 1GB 184-DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT18VDDT12872AY-40BF1.pdf
(29 pages)
Specifications of MT18VDDT12872AG-40BF1
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
400MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 16: DDR SDRAM Component Electrical Characteristics and
Notes: 1–5, 8, 12–15, 29, 31; notes appear on pages 19–21; 0°C
pdf: 09005aef80814e61, source: 09005aef80a43eed
DDA18C32_64_128x72AG.fm - Rev. E 9/04 EN
AC CHARACTERISTICS
PARAMETER
Access window of DQs from CK/CK#
CK high-level width
CK low-level width
Clock cycle time
DQ and DM input hold time relative to DQS
DQ and DM input setup time relative to DQS
DQ and DM input pulse width (for each input)
Access window of DQS from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS-DQ skew, DQS to last DQ valid, per group, per access
Write command to first DQS latching transition
DQS falling edge to CK rising - setup time
DQS falling edge from CK rising - hold time
Half clock period
Data-out high-impedance window from CK/CK#
Data-out low-impedance window from CK/CK#
Address and control input hold time (1 V/ns)
Address and control input setup time (1 V/ns)
Address and control input hold time (0.5 V/ns)
Address and control input setup time (0.5 V/ns)
Address and Control input pulse width (for each input)
LOAD MODE REGISTER command cycle time
DQ-DQS hold, DQS to first DQ to go non-valid, per access
Data hold skew factor
ACTIVE to PRECHARGE command
ACTIVE to READ with Auto precharge command
ACTIVE to ACTIVE/AUTO REFRESH command period
AUTO REFRESH command period
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
Recommended AC Operating Conditions
256MB, 512MB, 1GB (x72, ECC, DR), PC3200
CL = 3
CL = 2.5
CL = 2
17
SYMBOL
t
t
CK (2.5)
t
t
t
t
t
DQSCK
t
t
t
t
t
CK (3)
CK (2)
DQSH
DQSQ
DIPW
t
t
t
DQSL
DQSS
t
t
t
t
MRD
t
RPRE
RPST
t
t
t
t
DSH
t
t
t
t
QHS
RAP
RCD
t
IPW
RAS
t
t
t
DSS
t
t
t
RFC
QH
DH
T
AC
CH
HP
HZ
IH
IH
CL
DS
RC
RP
LZ
IS
IS
A
F
S
F
S
+70°C; V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
t
HP -
-0.70
MIN
0.45
0.45
1.75
0.35
0.35
0.72
-0.7
-0.6
7.5
0.4
0.4
0.2
0.2
0.6
0.6
0.6
0.6
2.2
0.9
0.4
40
15
55
70
15
15
DD
5
6
2
t
QHS
= V
t
CH,
-40B
DD
t
CL
Q = +2.6V ±0.1V
70,000
MAX
+0.70
+0.7
0.55
0.55
+0.6
0.40
1.28
0.50
7.5
1.1
0.6
13
13
UNITS
t
t
t
t
t
t
t
t
t
ns
CK
CK
ns
ns
ns
ns
ns
ns
ns
CK
CK
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
CK
©2004 Micron Technology, Inc.
NOTES
40, 45
40, 45
40, 45
23, 27
23, 27
22, 23
16, 37
16, 37
22, 23
26
26
27
30
12
12
30
43
38
38