MT36HTF25672FY-53EB3E3 Micron Technology Inc, MT36HTF25672FY-53EB3E3 Datasheet - Page 9

• Manufacturer Part Number: MT36HTF25672FY-53EB3E3
• Description: MODULE DDR2 2GB 240-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT36HTF25672FY-53EB3E3

• Memory Type: DDR2 SDRAM
• Memory Size: 2GB
• Speed: 533MT/s
• Package / Case: 240-DIMM
• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240FBDIMM
• Device Core Size: 72b
• Organization: 256Mx72
• Total Density: 2GByte
• Chip Density: 512Mb
• Package Type: FBDIMM
• Maximum Clock Rate: 533MHz
• Operating Supply Voltage (typ): 1.8V
• Number Of Elements: 36
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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PDF: 09005aef829a1e4d/Source: 09005aef8297c0ad
HTF36C256_512x72F_RC_H.fm - Rev. B 9/09 EN
Symbol
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DD_Idle_0
DD_Idle_1
DD_Active_1
DD_Active_2
DD_Training
DD_IBIS
DD_EI
Specifications and Conditions
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Conditions
Notes:
1. Actual test conditions may vary from published JEDEC test conditions.
Condition
Idle current, single, or last DIMM: Low state; Idle (0% bandwidth); Primary channel enabled;
Secondary channel disabled; CKE HIGH; Command and address lines stable; DDR2 SDRAM
clock active
Idle current, first DIMM: Low state; Idle (0% bandwidth); Primary and secondary channels
enabled; CKE HIGH; Command and address lines stable; DDR2 SDRAM clock active
Active power: Low state; 50% DRAM bandwidth; 67% READ, 33% WRITE; Primary and
secondary channels enabled; DDR2 SDRAM clock active; CKE HIGH
Active power, data pass through: Low state; 50% DRAM bandwidth to downstream DIMM,
67% READ; 33% WRITE; Primary and secondary channels enabled; DDR2 SDRAM clock active;
CKE HIGH; Command and address lines stable
Training: Primary and secondary channels enabled; 100% toggle on all channel lanes; DRAMs
idle, 0% bandwidth; CKE HIGH; Command and address lines stable; DDR2 SDRAM clock active
IBIST over all IBIST modes: DRAM idle (0% bandwidth); Primary channel enabled; Secondary
channel enabled; CKE HIGH; Command and address lines stable; DDR2 SDRAM clock active
Electrical idle: DRAM idle (0% bandwidth); Primary channel disabled; Secondary channel
disabled; CKE LOW; Command and address lines floated; DDR2 SDRAM clock active; ODT and
CKE driven LOW
2GB, 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
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Specifications and Conditions
©2007 Micron Technology, Inc. All rights reserved.