Z8F64210100ZDV Zilog, Z8F64210100ZDV Datasheet - Page 146
![ADAPTER ICE Z8 ENCORE 64K 44PLCC](/photos/9/2/90270/z8f64210100zdv_sml.jpg)
Z8F64210100ZDV
Manufacturer Part Number
Z8F64210100ZDV
Description
ADAPTER ICE Z8 ENCORE 64K 44PLCC
Manufacturer
Zilog
Specifications of Z8F64210100ZDV
Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3402
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PS019921-0308
SPI Baud Rate Generator
defined to be 1 through 8 bits by the NUMBITS field in the SPI Mode register. In slave
mode it is not necessary for SS to deassert between characters to generate the interrupt.
The SPI in Slave mode can also generate an interrupt if the SS signal deasserts prior to
transfer of all the bits in a character (see description of slave abort error above). Writing a
1 to the IRQ bit in the SPI Status Register clears the pending SPI interrupt request. The
IRQ bit must be cleared to 0 by the Interrupt Service Routine to generate future interrupts.
To start the transfer process, an SPI interrupt may be forced by software writing a 1 to the
STR bit in the SPICTL register.
If the SPI is disabled, an SPI interrupt can be generated by a Baud Rate Generator time-
out. This timer function must be enabled by setting the BIRQ bit in the SPICTL register.
This Baud Rate Generator time-out does not set the IRQ bit in the SPISTAT register, just
the SPI interrupt bit in the interrupt controller.
In SPI Master mode, the Baud Rate Generator creates a lower frequency serial clock
(SCK) for data transmission synchronization between the Master and the external Slave.
The input to the Baud Rate Generator is the system clock. The SPI Baud Rate High and
Low Byte registers combine to form a 16-bit reload value, BRG[15:0], for the SPI Baud
Rate Generator. The SPI baud rate is calculated using the following equation:
Minimum baud rate is obtained by setting BRG[15:0] to 0000H for a clock divisor value
of (2 X 65536 = 131072).
When the SPI is disabled, the Baud Rate Generator can function as a basic 16-bit timer
with interrupt on time-out. Follow the steps below to configure the Baud Rate Generator
as a timer with interrupt on time-out:
1. Disable the SPI by clearing the SPIEN bit in the SPI Control register to 0.
2. Load the desired 16-bit count value into the SPI Baud Rate High and Low Byte
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
When configured as a general purpose timer, the interrupt interval is calculated using the
following equation:
Interrupt Interval (s)
SPI Baud Rate (bits/s)
registers.
BIRQ bit in the SPI Control register to 1.
=
System Clock Period (s) BRG[15:0]
=
System Clock Frequency (Hz)
------------------------------------------------------------------------
2
×
BRG[15:0]
×
Z8 Encore! XP
Product Specification
Serial Peripheral Interface
®
F64XX Series
132
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