Z8F64210100ZDV Zilog, Z8F64210100ZDV Datasheet - Page 245
![ADAPTER ICE Z8 ENCORE 64K 44PLCC](/photos/9/2/90270/z8f64210100zdv_sml.jpg)
Z8F64210100ZDV
Manufacturer Part Number
Z8F64210100ZDV
Description
ADAPTER ICE Z8 ENCORE 64K 44PLCC
Manufacturer
Zilog
Specifications of Z8F64210100ZDV
Module/board Type
*
For Use With/related Products
Z8 Encore!™
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3402
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PS019921-0308
(Output)
(Input)
MOSI
MISO
SCK
SPI Master Mode Timing
Figure 52
shown with SCK rising edge used to source MOSI output data, SCK falling edge used to
sample MISO input data. Timing on the SS output pin(s) is controlled by software.
Table 117. SPI Master Mode Timing
Parameter
SPI Master
T
T
T
1
2
3
T1
and
Abbreviation
SCK Rise to MOSI output Valid Delay
MISO input to SCK (receive edge) Setup Time
MISO input to SCK (receive edge) Hold Time
Table 117
Figure 52. SPI Master Mode Timing
provide timing information for SPI Master mode pins. Timing is
T2
Input Data
T3
Output Data
Z8 Encore! XP
Product Specification
Electrical Characteristics
Min
®
20
-5
0
Delay (ns)
F64XX Series
Max
+5
231
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