C8051T606ZDB Silicon Laboratories Inc, C8051T606ZDB Datasheet - Page 25

CARD DAUGHTER QFN10 SOCKET

C8051T606ZDB

Manufacturer Part Number
C8051T606ZDB
Description
CARD DAUGHTER QFN10 SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of C8051T606ZDB

Module/board Type
Socket Module - QFN
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T606
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1668
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
C1
E
mask and the metal pad is to be 60 m minimum, all the way around the pad.
to assure good solder paste release.
Body Components.
Figure 5.2. SOIC-14 Recommended PCB Land Pattern
Table 5.2. SOIC-14 PCB Land Pattern Dimensions
5.30
Min
1.27 BSC
Max
5.40
Rev. 1.2
Dimension
C8051T600/1/2/3/4/5/6
X1
Y1
0.50
1.45
Min
1.55
Max
0.60
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