C8051T610DB28 Silicon Laboratories Inc, C8051T610DB28 Datasheet - Page 122
![DAUGHTER BOARD T610 28QFN SOCKET](/photos/9/3/90367/c8051t610db28_sml.jpg)
C8051T610DB28
Manufacturer Part Number
C8051T610DB28
Description
DAUGHTER BOARD T610 28QFN SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051T610DB32.pdf
(218 pages)
Specifications of C8051T610DB28
Module/board Type
Socket Module - QFN
Processor To Be Evaluated
C8051T61x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T610DK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1506
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C8051T610/1/2/3/4/5/6/7
SFR Definition 21.1. XBR0: Port I/O Crossbar Register 0
SFR Address = 0xE1
122
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
SYSCKE /SYSCLK Output Enable.
SMB0E
CP1AE
CP0AE
URT0E
SPI0E
Name
CP1E
CP0E
CP1AE
R/W
7
0
Comparator1 Asynchronous Output Enable.
0: Asynchronous CP1 unavailable at Port pin.
1: Asynchronous CP1 routed to Port pin.
Comparator1 Output Enable.
0: CP1 unavailable at Port pin.
1: CP1 routed to Port pin.
Comparator0 Asynchronous Output Enable.
0: Asynchronous CP0 unavailable at Port pin.
1: Asynchronous CP0 routed to Port pin.
Comparator0 Output Enable.
0: CP0 unavailable at Port pin.
1: CP0 routed to Port pin.
0: /SYSCLK unavailable at Port pin.
1: /SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pins.
1: SMBus I/O routed to Port pins.
SPI I/O Enable.
0: SPI I/O unavailable at Port pins.
1: SPI I/O routed to Port pins. Note that the SPI can be assigned either 3 or 4 GPIO
pins.
UART I/O Output Enable.
0: UART I/O unavailable at Port pin.
1: UART TX0, RX0 routed to Port pins P0.4 and P0.5.
CP1E
R/W
6
0
CP0AE
R/W
5
0
CP0E
R/W
Rev 1.0
4
0
Function
SYSCKE
R/W
3
0
SMB0E
R/W
2
0
SPI0E
R/W
1
0
URT0E
R/W
0
0
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