C8051T610DB28 Silicon Laboratories Inc, C8051T610DB28 Datasheet - Page 91
![DAUGHTER BOARD T610 28QFN SOCKET](/photos/9/3/90367/c8051t610db28_sml.jpg)
C8051T610DB28
Manufacturer Part Number
C8051T610DB28
Description
DAUGHTER BOARD T610 28QFN SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051T610DB32.pdf
(218 pages)
Specifications of C8051T610DB28
Module/board Type
Socket Module - QFN
Processor To Be Evaluated
C8051T61x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T610DK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1506
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SFR Definition 16.4. EIP1: Extended Interrupt Priority 1
SFR Address = 0xF6
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
Reserved Reserved. Must Write 0.
PWADC0 ADC0 Window Comparator Interrupt Priority Control.
PSMB0
PPCA0
PADC0
Name
PCP1
PCP0
PT3
R/W
PT3
7
0
Timer 3 Interrupt Priority Control.
This bit sets the priority of the Timer 3 interrupt.
0: Timer 3 interrupts set to low priority level.
1: Timer 3 interrupts set to high priority level.
Comparator1 (CP1) Interrupt Priority Control.
This bit sets the priority of the CP1 interrupt.
0: CP1 interrupt set to low priority level.
1: CP1 interrupt set to high priority level.
Comparator0 (CP0) Interrupt Priority Control.
This bit sets the priority of the CP0 interrupt.
0: CP0 interrupt set to low priority level.
1: CP0 interrupt set to high priority level.
Programmable Counter Array (PCA0) Interrupt Priority Control.
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
ADC0 Conversion Complete Interrupt Priority Control.
This bit sets the priority of the ADC0 Conversion Complete interrupt.
0: ADC0 Conversion Complete interrupt set to low priority level.
1: ADC0 Conversion Complete interrupt set to high priority level.
This bit sets the priority of the ADC0 Window interrupt.
0: ADC0 Window interrupt set to low priority level.
1: ADC0 Window interrupt set to high priority level.
SMBus (SMB0) Interrupt Priority Control.
This bit sets the priority of the SMB0 interrupt.
0: SMB0 interrupt set to low priority level.
1: SMB0 interrupt set to high priority level.
PCP1
R/W
6
0
PCP0
R/W
5
0
PPCA0
R/W
Rev 1.0
4
0
C8051T610/1/2/3/4/5/6/7
Function
PADC0
R/W
3
0
PWADC0
R/W
2
0
Reserved
R/W
1
0
PSMB0
R/W
0
0
91
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