LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 20
LFDAS12XSDT
Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet
1.LFDAS12XSCT.pdf
(738 pages)
Specifications of LFDAS12XSDT
Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
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- Current page: 20 of 738
- Download datasheet (4Mb)
Device Overview S12XS Family
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INT (interrupt module)
— Seven levels of nested interrupts
— Flexible assignment of interrupt sources to each interrupt level.
— External non-maskable high priority interrupt (XIRQ)
— The following inputs can act as Wake-up Interrupts
MMC (module mapping control)
DBG (debug module)
— Monitoring of CPU bus with tag-type or force-type breakpoint requests
— 64 x 64-bit circular trace buffer captures change-of-flow or memory access information
BDM (background debug mode)
OSC_LCP (oscillator)
— Low power loop control Pierce oscillator utilizing a 4MHz to 16MHz crystal
— Good noise immunity
— Full-swing Pierce option utilizing a 2MHz to 40MHz crystal
— Transconductance sized for optimum start-up margin for typical crystals
IPLL (Internally filtered, frequency modulated phase-locked-loop clock generation)
— No external components required
— Configurable option to spread spectrum for reduced EMC radiation (frequency modulation)
CRG (clock and reset generation)
— COP watchdog
— Real time interrupt
— Clock monitor
— Fast wake up from STOP in self clock mode
Memory Options
— 64K, 128K and 256K byte Flash
— Flash General Features
— 4K and 8K byte Data Flash space
– IRQ and non-maskable XIRQ
– CAN receive pins
– SCI receive pins
– Depending on the package option up to 20 pins on ports J, H and P configurable as rising or
– 64 data bits plus 8 syndrome ECC (Error Correction Code) bits allow single bit failure
– Erase sector size 1024 bytes
– Automated program and erase algorithm
– Protection scheme to prevent accidental program or erase
– Security option to prevent unauthorized access
– Sense-amp margin level setting for reads
falling edge sensitive
correction and double fault detection
S12XS Family Reference Manual, Rev. 1.11
Freescale Semiconductor
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