LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 679
LFDAS12XSDT
Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet
1.LFDAS12XSCT.pdf
(738 pages)
Specifications of LFDAS12XSDT
Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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A.3
A.3.1
The time base for all NVM program or erase operations is derived from the oscillator. A minimum
oscillator frequency f
do not have any means to monitor the frequency and will not prevent program or erase operation at
frequencies above or below the specified minimum. When attempting to program or erase the NVM
modules at a lower frequency, a full program or erase transition is not assured.
The program and erase operations are timed using a clock derived from the oscillator using the FCLKDIV
register. The frequency of this clock must be set within the limits specified as f
The minimum program and erase times shown in
maximum f
A.3.1.1
The time it takes to perform a blank check is dependant on the location of the first non-blank word starting
at relative address zero. It takes one bus cycle per phrase to verify plus a setup of the command. Assuming
that no non blank location is found, then the erase verify all blocks is given by.
A.3.1.2
The time it takes to perform a blank check is dependant on the location of the first non-blank word starting
at relative address zero. It takes one bus cycle per phrase to verify plus a setup of the command. Assuming
that no non blank location is found, then the erase verify time for a single 256K NVM array is given by
For a 128K NVM or D-Flash array the erase verify time is given by
A.3.1.3
The maximum time depends on the number of phrases being verified (N
Freescale Semiconductor
t
t
t
t
check
check
check
check
NVM, Flash
=
=
=
=
NVMBUS
Timing Parameters
33500
33500
17200
Erase Verify All Blocks (Blank Check) (FCMD=0x01)
Erase Verify Block (Blank Check) (FCMD=0x02)
Erase Verify P-Flash Section (FCMD=0x03)
(
752
+
⋅
⋅
⋅
N
-------------------- -
f
-------------------- -
f
-------------------- -
f
NVMBUS
NVMBUS
NVMBUS
unless otherwise shown. The maximum times are calculated for minimum f
NVMOSC
VP
1
1
1
)
⋅
-------------------- -
f
NVMBUS
1
is required for performing program or erase operations. The NVM modules
S12XS Family Reference Manual, Rev. 1.11
Table A-18
are calculated for maximum f
VP
)
NVMOP
Electrical Characteristics
.
NVMOP
NVMOP
and
679
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