ATWEBDVK-02WC Atmel, ATWEBDVK-02WC Datasheet - Page 15

KIT DEV TCP/IP AT89C51RD2 WEBCAM

ATWEBDVK-02WC

Manufacturer Part Number
ATWEBDVK-02WC
Description
KIT DEV TCP/IP AT89C51RD2 WEBCAM
Manufacturer
Atmel
Series
@Webr
Datasheet

Specifications of ATWEBDVK-02WC

Main Purpose
*
Embedded
*
Utilized Ic / Part
AT89C51RD2
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
6. Oscillator
6.1
4235K–8051–05/08
Registers
To optimize the power consumption and execution time needed for a specific task, an internal
prescaler feature has been implemented between the oscillator and the CPU and peripherals.
Table 6-1.
CKRL – Clock Reload Register (97h)
Reset Value = 1111 1111b
Not bit addressable
Table 6-2.
PCON – Power Control Register (87h)
Reset Value = 00X1 0000b Not bit addressable
SMOD1
CKRL7
Bit Number
Bit Number
7
7
7:0
7
6
5
4
3
2
1
0
CKRL Register
PCON Register
SMOD0
CKRL6
6
6
Bit Mnemonic
Mnemonic
SMOD1
SMOD0
CKRL
POF
GF1
GF0
IDL
PD
-
CKRL5
5
-
5
Description
Clock Reload Register
Prescaler value
Description
Serial Port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
Serial Port Mode bit 0
Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Power-off Flag
Cleared by software to recognize the next reset type.
Set by hardware when V
set by software.
General-purpose Flag
Cleared by software for general-purpose usage.
Set by software for general-purpose usage.
General-purpose Flag
Cleared by software for general-purpose usage.
Set by software for general-purpose usage.
Power-down Mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle Mode bit
Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.
CKRL4
POF
4
4
CKRL3
GF1
3
3
CC
rises from 0 to its nominal voltage. Can also be
AT89C51RD2/ED2
CKRL2
GF0
2
2
CKRL1
PD
1
1
CKRL0
IDL
0
0
15

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