ATWEBDVK-02WC Atmel, ATWEBDVK-02WC Datasheet - Page 21
ATWEBDVK-02WC
Manufacturer Part Number
ATWEBDVK-02WC
Description
KIT DEV TCP/IP AT89C51RD2 WEBCAM
Manufacturer
Atmel
Series
@Webr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of ATWEBDVK-02WC
Main Purpose
*
Embedded
*
Utilized Ic / Part
AT89C51RD2
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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8. Dual Data Pointer Register (DPTR)
Figure 8-1.
4235K–8051–05/08
Use of Dual Pointer
7
AUXR1(A2H)
The additional data pointer can be used to speed up code execution and reduce code size.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called DPS = AUXR1.0 (see Table 8-1) that allows the program code to switch
between them (Refer to Figure 8-1).
Table 8-1.
AUXR1- Auxiliary Register 1(0A2h)
Number
Bit
7
7
6
5
4
3
2
1
0
-
Mnemonic
ENBOOT
AUXR1 Register
DPS
0
GF3
DPS
Bit
6
0
-
-
-
-
-
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general-purpose user flag.
Always cleared
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
DPH(83H) DPL(82H)
5
DPTR1
4
-
DPTR0
GF3
3
(1)
AT89C51RD2/ED2
2
0
External Data Memory
1
-
DPS
0
21
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