AD9958/PCBZ Analog Devices Inc, AD9958/PCBZ Datasheet - Page 13

BOARD EVALUATION FOR AD9958

AD9958/PCBZ

Manufacturer Part Number
AD9958/PCBZ
Description
BOARD EVALUATION FOR AD9958
Manufacturer
Analog Devices Inc
Series
AgileRF™r
Datasheets

Specifications of AD9958/PCBZ

Design Resources
Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109) Phase Coherent FSK Modulator (CN0186)
Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9958
Primary Attributes
10-Bit DAC, 32-Bit Tuning Word Width
Secondary Attributes
500MHz, Graphical User Interface, 2-Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9958/PCBZ
Manufacturer:
Analog Devices Inc
Quantity:
135
Channel Output Config
The Channel Output Config window configures various
output characteristics of the channel(s). Use the Channel 0
and Channel 1 tabs to select which specific channel options
to configure. The following section describes the options that
are numerically indexed in Figure 23.
1. Single Tone Setup
Use Single Tone Setup to configure the channel output for the
single tone mode of operation (default).
Enter the desired output frequency directly in the Frequency 00
box or double-click the Frequency 00 box to launch the Edit
Output Frequency pop-up box to set the output frequency in
the Frequency box. The output frequency can alternatively be
set in decimal, hex, or binary format by editing the respective
boxes in Tuning Word Values (see Figure 24).
Note that the Phase Offset, Enable ASF, Amplitude Ramp
Rate, Rising Step Size, Rising Step Interval, Falling Step Size,
and Falling Step Interval boxes all offer the edit option shown
in Figure 24 by double-clicking their respective boxes.
1
2
3
Figure 24.
Figure 23. Channel Output Config Window
Rev. 0 | Page 13 of 28
The Frequency 00 box also sets the starting point of the linear
frequency sweep and the first level in frequency modulation (FSK).
Phase Offset consists of two fields. In the first field, set the
integer factor (1 to 999) to increment or decrement the phase
offset. The default setting of this field is 1, indicating that the
phase offset is incremented/decremented by .022 degrees when
pressing the up or down arrow keys. The value of .022 degrees is
derived from this equation:
Therefore, entering a factor of 3 in the first field allows you to
increment/decrement the phase offset by .066 degrees. In the
second box, input the desired phase offset (from 0 degrees to
360 degrees) of the output signal.
The Phase Offset box also represents the starting point of the
linear phase sweep and the first level in phase modulation
(PSK).
In order to use the output amplitude scalar, the Enable ASF
check box must be selected. In the first field, set the integer factor
(1 to 999) to increment or decrement the amplitude scale factor.
The default setting of this field is 1, meaning the output
amplitude is scaled up/down by .00098 when pressing the up or
down arrow keys. The value of .00098 is derived from this
equation:
⎛ ×
⎛ ×
2
2
(
10
(
14
1
4
1
)
1
AD9958/PCB
×
360
°
) ⎟ ⎠
−1

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