AD9954/PCBZ Analog Devices Inc, AD9954/PCBZ Datasheet - Page 28

• Manufacturer Part Number: AD9954/PCBZ
• Description: BOARD EVAL FOR 9954
• Manufacturer: Analog Devices Inc
• Series: AgileRF™r

Specifications of AD9954/PCBZ

• Main Purpose: Timing, Direct Digital Synthesis (DDS)
• Embedded: No
• Utilized Ic / Part: AD9954
• Primary Attributes: 14-Bit DAC, 32-Bit Tuning Word Width
• Secondary Attributes: 400MHz, Graphical User Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9954
Table 13. Register Map—When Linear Sweep Enable Bit Is True (CFR1<21> = 1)
Note that the RAM Enable Bit CFR1<31> only activates the RAM itself, not the RAM segment control words.
Register Name
(Serial Address)
Control
Function
Register No. 1
(CFR1)
(0x00)
Control
Function
Register
No. 2 (CFR2)
(0x01)
Amplitude
Scale Factor
(ASF) (0x02)
Amplitude
Ramp Rate
(ARR) (0x03)
Frequency
Tuning
Word
(FTW0)
(0x04)
Phase Offset
Word (POW0)
(0x05)
Frequency
Tuning
Word (FTW1)
(0x06)
Negative
Linear
Sweep
Control
Word (NLSCW)
(0x07)
Positive
Linear
Sweep
Control
Word (PLSCW)
(0x08)
Bit
Range
<7:0>
<15:8>
<23:16>
<31:24>
<7:0>
<15:8>
<23:16>
<7:0>
(0x07)
<15:8>
<7:0>
<7:0>
<15:8>
<23:16>
<31:24>
<7:0>
<15:8>
<7:0>
<15:8>
<23:16>
<31:24>
<7:0>
<15:8>
<23:16>
<31:24>
<39:32>
<7:0>
<15:8>
<23:16>
<31:24>
<39:32>
(MSB)
Bit 7
Digital
Power-
Down
SRR Load
Enable
Automatic
Sync
Enable
RAM
Enable
Speed Control<1:0>
Auto Ramp Rate
Open<1:0>
Bit 6
Comp
Power-
Down
AutoClr
Freq
Accum
Software
Manual
Sync
RAM
Destination
Not Used
REFCLK Multiplier
Falling Delta Frequency Tuning Word<23:16>
Falling Delta Frequency Tuning Word<31:24>
Rising Delta Frequency Tuning Word <31:24>
Rising Delta Frequency Tuning Word<23:16>
Falling Delta Frequency Tuning Word<15:8>
Rising Delta Frequency Tuning Word<15:8>
Falling Delta Frequency Tuning Word<7:0>
Rising Delta Frequency Tuning Word<7:0>
Frequency Tuning Word No. 0<23:16>
Frequency Tuning Word No. 0<31:24>
Frequency Tuning Word No. 1<23:16>
Frequency Tuning Word No. 1<31:24>
Amplitude Scale Factor Register<7:0>
Bit 5
DAC
Power-
Down
AutoClr
Phase
Accum
Linear
Sweep
Enable
Falling Sweep Ramp Rate Word<7:0>
Amplitude Ramp Rate Register<7:0>
Frequency Tuning Word No. 0<15:8>
Frequency Tuning Word No. 1<15:8>
Rising Sweep Ramp Rate Word<7:0>
Frequency Tuning Word No. 0<7:0>
Frequency Tuning Word No. 1<7:0>
Rev. B | Page 28 of 40
Internal Profile Control<2:0>
Phase Offset Word No. 0<7:0>
Bit 4
Clock
Input
Power
Down
Sine/
Cosine
Select
Not
Used
Amplitude Scale Factor Register<13:8>
Not Used
Phase Offset Word No. 0<13:8>
Bit 3
External
Power-
Down
Mode
Clear
Freq
Accum
Not
Used
High
Speed
Sync
Enable
Bit 2
Linear
Sweep
No Dwell
Clear
Phase
Accum
Not Used
Load ARR
Control
VCO
Range
Hardware
Manual
Sync
Enable
Bit 1
SYNC_CLK
Disable
SDIO
Input
Only
Not Used
OSK
Enable
XTAL
OUT
Enable
Charge Pump
Current<1:0>
(LSB)
Bit 0
Not
Used
LSB
First
Not
Used
Auto
OSK
Enable
Not
Used
Default
Value Or
Profile
0x00
0x00
0x00
0x00
0x00
0x00
0x18
0x00
0x00
0x00
0x00
0x00
0x00
PS0 = 0
PS0 = 0
PS0 = 0
PS0 = 0
PS0 = 0
PS0 = 1
PS0 = 1
PS0 = 1
PS0 = 1
PS0 = 1