Z8FMC160100KITG Zilog, Z8FMC160100KITG Datasheet - Page 163
Z8FMC160100KITG
Manufacturer Part Number
Z8FMC160100KITG
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KITG.pdf
(2 pages)
4.Z8FMC160100KITG.pdf
(15 pages)
Specifications of Z8FMC160100KITG
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphical User Interface
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4660
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PS024613-0910
Table 83. SPI Clock Phase and Clock Polarity Operation
Transfer Format Phase Equals Zero
Figure 25
The two SCK waveforms show polarity with CLKPOL reset to 0 and with CLKPOL set to
1. The diagram can be interpreted as either a master or slave timing diagram because the
SCK Master-In/Slave-Out (MISO) and Master-Out/Slave-In (MOSI) pins are directly
connected between the master and the slave.
Input Sample Time
PHASE
(CLKPOL = 0)
(CLKPOL = 1)
0
0
1
1
displays the timing diagram for an SPI transfer in which
MOSI
MISO
SCK
SCK
SS
CLKPOL
0
1
0
1
Figure 25. SPI Timing When Phase is 0
Bit 7
Bit 7
Bit 6
Bit 6
SCK Transmit
Falling
Falling
Rising
Rising
Edge
Bit 5
Bit 5
Bit 4
Bit 4
Z8FMC16100 Series Flash MCU
SCK Receive
Bit 3
Bit 3
SPI Clock Phase and Polarity Control
Falling
Falling
Rising
Rising
Edge
Bit 2
Bit 2
Product Specification
PHASE
Bit 1
Bit 1
is cleared to 0.
SCK Idle
Bit 0
Bit 0
State
High
High
Low
Low
151
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