STEVAL-ILH001V1 STMicroelectronics, STEVAL-ILH001V1 Datasheet - Page 17

• Manufacturer Part Number: STEVAL-ILH001V1
• Description: BOARD STF20NM50FD/STF7LITE39BF2
• Manufacturer: STMicroelectronics

Specifications of STEVAL-ILH001V1

• Design Resources: STEVAL-ILH001V1 Gerber Files STEVAL-ILH001V1 Schematic STEVAL-ILH001V1 Bill of Material
• Main Purpose: Lighting, Ballast Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: L6562, ST7FLITE39F2
• Primary Attributes: 250W for HID Metal Halide Lamps
• Secondary Attributes: PFC, 90 ~ 265 VAC, MCU Based
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8406

LIS331DLF
5
5.1
Digital interfaces
The registers embedded inside the LIS331DLF may be accessed through both the I
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I
line must be tied high (i.e. connected to Vdd_IO).
Table 8.
I
The LIS331DLF I
content can also be read back.
The relevant I
Table 9.
There are two signals associated with the I
data line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface. Both the lines are connected to Vdd_IO through a pull-up resistor
embedded inside the LIS331DLF. When the bus is free both the lines are high.
The I
normal mode.
2
C serial interface
Transmitter
2
Pin name
Receiver
C interface is compliant with fast mode (400 kHz) I
Master
Term
Slave
SDO
SDO
SPC
SDA
SCL
SA0
SDI
CS
Serial interface pin description
Serial interface pin description
2
C terminology is given in the table below.
2
C is a bus slave. The I
SPI enable
I
I
SPI serial port clock (SPC)
I
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
I
SPI serial data output (SDO)
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
2
2
2
2
C/SPI mode selection (1: I
C serial clock (SCL)
C serial data (SDA)
C less significant bit of the device address (SA0)
Doc ID 15101 Rev 4
2
C is employed to write data into registers whose
2
C bus: the serial clock line (SCL) and the serial
2
C mode; 0: SPI enabled)
Pin description
Description
2
C standards as well as with the
Digital interfaces
2
C interface, CS
2
C and
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