CDB42518 Cirrus Logic Inc, CDB42518 Datasheet - Page 62

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CDB42518

Manufacturer Part Number
CDB42518
Description
BOARD EVAL FOR CS42518 CODEC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42518

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42518/16
Primary Attributes
6 Single-Ended Analog Inputs and 8 Outputs, S/PDIF Digital Audio Transmitter and Receiver
Secondary Attributes
GUI, I2C, SPI Interfaces
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1502
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6.18.2 DE-EMPHASIS SELECT BITS (DE-EMPHX)
6.18.3 INTERRUPT PIN CONTROL (INTX)
6.18.4 AUDIO SAMPLE HOLD (HOLDX)
Default = 00
00 - Reserved
01 - De-Emphasis for 32 kHz sample rate.
10 - De-Emphasis for 44.1 kHz sample rate.
11 - De-Emphasis for 48 kHz sample rate.
Function:
Used to specify which de-emphasis filter to apply when the
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Default = 00
00 - Active high; high output indicates interrupt condition has occurred
01 - Active low; low output indicates an interrupt condition has occurred
10 - Open drain, active low. Requires an external pull-up resistor on the INT pin.
11 - Reserved
Function:
Determines how the interrupt pin (INT) will indicate an interrupt condition.
Default = 00
00 - Hold the last valid audio sample
01 - Replace the current audio sample with 00 (mute)
10 - Do not change the received audio sample
11 - Reserved
Function:
Determines how received audio samples are affected when a receiver error occurs.
is enabled.
“Force PLL Lock (FRC_PLL_LK)” on
CS42518
DS584F1

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