LM5067EVAL National Semiconductor, LM5067EVAL Datasheet - Page 3

• Manufacturer Part Number: LM5067EVAL
• Description: NEGATIVE HOT SWAP / INRUSH CURRE
• Manufacturer: National Semiconductor

Specifications of LM5067EVAL

• Main Purpose: Power Management, Hot Swap Controller
• Utilized Ic / Part: LM5067
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

propriate voltage up to 80V above V
lower than system ground.
The UVLO and OVLO thresholds are set by resistors R1-R3.
The UVLO and OVLO thresholds are reached when the volt-
Board Layout and Probing Cautions
The pictorial in Figure 1 shows the placement of the circuit
components. The following should be kept in mind when the
board is powered:
1. High voltage, equal to VIN, is present on C3, C4, C7, R9,
Q1, and various points within the circuit. Use CAUTION when
probing the circuit to prevent injury, as well as possible dam-
age to the circuit.
2. At maximum load current (5A), the wire size and length
used to connect the power source and the load become im-
portant. The wires connecting this evaluation board to the
power source SHOULD BE TWISTED TOGETHER to mini-
mize inductance in those leads. The same applies for the
wires connecting this board to the load. This recommendation
is made in order to minimize high voltage transients from oc-
curing when the load current is shut off.
FIGURE 3. Power Up Using Power Limit and Current Limit
EE
, and can be higher or
3
age at the UVLO and OVLO pins each reach 2.5V, respec-
tively. The internal 22 µA current sources provide hysteresis
for each of the thresholds.
Board Connections/Startup
The input voltage source is connected to the J1 connector
(Ground to GND, negative supply voltage to VIN). The load is
connected to the J2 connector at the GND and OUT terminals.
USE TWISTED WIRE. A voltmeter should be connected to
the input terminals, and one to the output terminals. The input
current can be monitored with an ammeter or current probe.
To monitor the status of the PGD output, connect a voltmeter
from PGOOD to GND, or from PGOOD to the VEE test point
(near Q1).
Put the toggle switch to the ON position. Increase the input
voltage gradually. When the UVLO threshold is reached
(
If the input current is viewed on an oscilloscope, the waveform
will be similar to that shown in Figure 3, and will settle at the
value determined by the load and the input voltage. The turn-
on timing depends on the input voltage, power limit setting,
current limit setting, load capacitance, and the final load cur-
rent, and is between
with a 4A load current with Vin = -36V. See Figures 8 and 9.
≊
-34.5V) Q1 is switched on and the output voltage increases.
≊
3 ms with no load current, and
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≊
16 ms