LVDS001EVK National Semiconductor, LVDS001EVK Datasheet - Page 3

• Manufacturer Part Number: LVDS001EVK
• Description: BOARD EVALUATION DS90LV001
• Manufacturer: National Semiconductor

Specifications of LVDS001EVK

• Main Purpose: Interface, LVDS, Repeater
• Utilized Ic / Part: DS90LV001
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

IN-
IN+
Purpose
The purpose of the Low Voltage Differential Signaling (LVDS) Evaluation Printed Circuit Board (PCB) is to allow
the user to evaluate the performance of the device. The part number for the Evaluation Kit is LVDS001EVK.
Board Description
The simplified block diagram of this board is shown in Figure 3 below.
Termination options on the buffer inputs (IN- and IN+) accommodate either two separate 50 Ohm terminations
(RT1 and RT2) (each line to ground when RT3 of 0 Ohms is in place) on the bottom of the board or a 100 Ohm
resistor connected across the inputs (differential) when RT3 is removed. The first option allows for a standard
signal generator interface. The second option allows for the DS90LV001 to be driven by an LVDS driver. Input
signals are connected at test points IN- and IN+. A direct probe connection is possible with a TEK P6247
differential probe high impedance probe (>1GHz bandwidth) on the LVDS signals at test point J2.
The termination load of a standard 100 Ohm differential termination along with series 453 Ohm resistors (RS1
and RS2) are implemented since 50 Ohm probes are employed on the buffer output signal through the SMA
connectors OUT- and OUT+. The LVDS driver cannot drive the 50 Ohm load to ground, so a V_BIAS voltage of
+13V is used with additional resistor network circuitry to minimize this additional load. Note that the scope
waveform is an attenuated signal (50 Ohm/(450 Ohm = 50 Ohm) or 1/10
A direct differential probe connection is possible with a TEK P6247 differential high impedance probe (>1GHz
bandwidth) on the output LVDS signals at test point J3. The series 453 Ohm resistors (RS1 and RS2) must be
removed to allow a clean test point.
PCB Design
Due to the high speed switching rates obtainable by LVDS a minimum of a four layer PCB construction and FR-4
material is recommended. This allows for 2 signal layers and full power and ground planes. The stack is: signal
(LVDS), ground, power, signal. The DS90LV001 demo board is a six layer board of FR-4 material with the
following stack: signal (LVDS), ground, power, ground, ground, signal. This stack sandwiches the power plane
with two ground planes creating good decoupling capacitance.
Although differential traces are highly recommended for LVDS signals, due to the short distance on this demo
board, 50 Ohm single-ended microstrip lines are used. Equations for calculating impedance are contained in
National application note AN-905 for both microstrip and stripline PCB traces.
J2
_
+
50
RT1
50
RT2
0
RT3
Figure 3: PCB Block Diagram
DS90LV001
L
_
+
EN
U1
H
J3 _
+
th
50
RT1
50
RT2
of the output signal.
453
RS2
453
RS1
1620 RVT
453 RS3
OUT+
OUT-
50
RT5
0.1µF
C2
V_BIAS
+13V
3