DP83816-MAAP National Semiconductor, DP83816-MAAP Datasheet - Page 14
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DP83816-MAAP
Manufacturer Part Number
DP83816-MAAP
Description
BOARD EVALUATION DP83816
Manufacturer
National Semiconductor
Datasheet
1.DP83816AVNGNOPB.pdf
(106 pages)
Specifications of DP83816-MAAP
Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83816
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
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3.0 Functional Description
3.2.4 MIB
The MIB block contains counters to track certain media
events required by the management specifications RFC
1213 (MIB II), RFC 1398 (Ether-like MIB), and IEEE 802.3
LME. The counters provided are for events which are either
difficult or impossible to be intercepted directly by software.
Not all counters are implemented, however required
counters can be calculated from the counters provided.
3.3 Interface Definitions
3.3.1 PCI System Bus
This interface allows direct connection of the DP83816 to a
33 MHz PCI system bus. The DP83816 supports zero wait
state data transfers with burst sizes up to 128 dwords. The
Note: B = Bytes
60b
PA
b = bits
Figure 3-3 Ethernet Packet Format
SFD
4b
DA
6B
SA
6B
LEN
2B
46B-1500B
(Continued)
Data
FCS
4B
14
DP83816 conforms to 3.3V AC/DC specifications, but has
5V tolerant inputs.
3.3.2 Boot PROM
The BIOS ROM interface allows the DP83816 to read from
and write data to an external ROM/Flash device.
3.3.3 EEPROM
The DP83816 supports the attachment of an external
EEPROM. The EEPROM interface provides the ability for
the DP83816 to read from and write data to an external
serial EEPROM device. The DP83816 will auto-load values
from the EEPROM to certain fields in PCI configuration
space and operational space and perform a checksum to
verify that the data is valid. Values in the external EEPROM
allow default fields in PCI configuration space and I/O
space to be overridden following a hardware reset. If the
EEPROM is not present, the DP83816 initialization uses
default values for the appropriate Configuration and
Operational Registers. Software can read and write to the
EEPROM using “bit-bang” accesses via the EEPROM
Access Register (MEAR).
3.3.4 Clock
The clock interface provides the 25 MHz clock reference
input for the DP83816 IC. The X1 input signal amplitude
should be approximately 1V. This interface supports
operation from a 25 MHz, 50 ppm CMOS oscillator, or a 25
MHz, 50 ppm, parallel, 20 pF load, < 40 Ω ESR crystal
resonator. A 20pF crystal resonator would require C1 and
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