DP83816-MAAP National Semiconductor, DP83816-MAAP Datasheet - Page 35
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DP83816-MAAP
Manufacturer Part Number
DP83816-MAAP
Description
BOARD EVALUATION DP83816
Manufacturer
National Semiconductor
Datasheet
1.DP83816AVNGNOPB.pdf
(106 pages)
Specifications of DP83816-MAAP
Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83816
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
- Current page: 35 of 106
- Download datasheet (819Kb)
4.0 Register Set
4.1.8 Boot ROM Configuration Register
4.1.9 Capabilities Pointer Register
This register stores the capabilities linked list offset into the PCI configuration space.
31-16
15-11
10-1
31-8
Bit
Bit
7-0
0
ROMBASE
Bit Name
Bit Name
ROMSIZE
ROMEN
CLOFS
Offset: 30h
Offset: 34h
(Continued)
Tag: CFGROM
Tag: CAPPTR
ROM Base Address
Set to the base address for the boot ROM.
ROM Size
Set to 0 indicating a requirement for 64K bytes of Boot ROM space. Read only.
unused
(reads return 0)
ROM Enable
This is used by the PCI BIOS to enable accesses to boot ROM. This allows the DP83816 to share the
address decode logic between the boot ROM and itself. The BIOS will copy the contents of the boot
ROM to system RAM before executing it. Set to 1 enables the address decode for boot ROM disabling
access to operational target registers.
unused
(reads return 0)
Capabilities List Offset
Offset into PCI configuration space for the location of the first item in the Capabilities Linked List, set to
40h to point to the PMCAP register.
Access: Read Write
Access: Read Only
Size: 32 bits
Size: 32 bits
35
Description
Description
Hard Reset: 00000000h
Hard Reset: 00000040h
Soft Reset: unchanged
Soft Reset: unchanged
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