DP83816-MAAP National Semiconductor, DP83816-MAAP Datasheet - Page 64
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DP83816-MAAP
Manufacturer Part Number
DP83816-MAAP
Description
BOARD EVALUATION DP83816
Manufacturer
National Semiconductor
Datasheet
1.DP83816AVNGNOPB.pdf
(106 pages)
Specifications of DP83816-MAAP
Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83816
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
- Current page: 64 of 106
- Download datasheet (819Kb)
4.0 Register Set
4.2.23 Management Information Base Control Register
The MIBC register is used to control access to the statistics block and the warning bits and to control the collection of
management information statistics.
31-4
Bit
3
2
1
0
Bit Name
ACLR
MIBS
WRN
FRZ
Offset: 005ch
(Continued)
Tag: MIBC
unused
MIB Counter Strobe
Writing a 1 to this bit location causes the counters in all enabled blocks to increment by 1, providing a
single-step test function. The MIBS bit is always read back as 0. This bit is used for test purposes
only and should be set to 0 for normal counter operation.
Clear all counters
When set to a 1, this bit forces all counters to be reset to 0. This bit is always read back as 0.
Freeze all counters
When set to a 1, this bit forces count values to be frozen such that a read of the statistic block will
represent management statistics at a given instant in time. When set to 0, the counters will increment
normally and may be read individually while counting. While frozen events will not be recorded.
Warning Test Indicator
This field is read only. This bit is set to 1 when statistic counters have reached their respective overflow
warning condition. WRN will be cleared after one or more of the statistic counters have been cleared.
Access: Read Write
Size: 32 bits
64
Description
Hard Reset: 00000002h
Soft Reset: 00000002h
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