KIT15XS3400EVBE Freescale Semiconductor, KIT15XS3400EVBE Datasheet - Page 35

• Manufacturer Part Number: KIT15XS3400EVBE
• Description: BOARD EVALUATION FOR 5XS3400
• Manufacturer: Freescale Semiconductor
• Type: MOSFET & Power Driverr

Specifications of KIT15XS3400EVBE

• Main Purpose: Automotive Lighting
• Embedded: No
• Utilized Ic / Part: MC15XS3400
• Primary Attributes: Four low RDS(ON) MOSFETs
• Secondary Attributes: Temperature Protection
• Interface Type: SPI
• Product: Power Management Modules
• Silicon Manufacturer: Freescale
• Silicon Core Number: MC15XS3400
• Kit Application Type: Power Management
• Application Sub Type: EXtreme Switch
• Kit Contents: Board, CD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 15XS3400

CISPR25 emission standard and 200V/m or BCI 200 mA
injection level for immunity tests.
SERIAL INPUT COMMUNICATION
messages. A message is transmitted by the MCU starting
with the MSB D15 and ending with the LSB, D0
Each incoming command message on the SI pin can be
interpreted using the following bit assignments: the MSB,
D15, is the watchdog bit (WDIN). In some cases, output
selection is done with bits D14 : D13. The next three bits,
D12: D10, are used to select the command register. The
Table 10. SI Message Bit Assignment
Table 11. Serial Input Address and Configuration Bit Map
state after
Analog Integrated Circuit Device Data
Freescale Semiconductor
CONFR0_
CONFR1_
V
RST=0 or
condition
PWMR_s WDI
STATR_s WDI
V
Register
Register
x = Don’t care.
s = Output selection with the bits A
SUPPLY(P
OCR_s
CALR
DD(FAIL)
The 15XS3400 successfully meets the Class 5 of the
SPI communication is accomplished using 16-bit
GCR
OR)
SI
or
s
s
Bit Sig
MSB
LSB
WDI
WDI
WDI
WDI
WDI
D15
N
N
N
N
N
N
N
0
D1
A
A
A
A
X
4
0
0
0
1
1
1
1
D13
A
A
A
A
X
0
0
0
0
0
0
0
D1
SI Msg Bit
2
0
0
0
0
1
1
1
X
D14
D12
D8:D0
D15
D1
D9
X
1
0
0
1
1
0
0
1
:
:
D13
D10
D1
X
0
0
1
0
1
0
1
1
1
A
0
D9
0
0
0
0
0
0
0
0
as defined in
Xenon_
VDD_F
28W_s
AIL_en
D8
0
0
0
s
1
0
LOGIC COMMANDS AND REGISTERS
Watchdog in: toggled to satisfy watchdog requirements.
Register address bits used in some cases for output selection (
Register address bits.
Not used (set to logic [0]).
Used to configure the inputs, outputs, and the device protection features and SO status content.
PWM_en CLOCK_sel TEMP_en
BC1_s
ON_s
Table
D7
(Table
0
0
0
0
0
12.
unlimited_s
PWM6_s
10).
Retry_
BC0_s
D6
0
0
1
0
Retry_dis_s OS_dis_s OLON_dis_s OLOFF_dis_
DIR_dis_s
SI Data
PWM5_s
OC1_s
remaining nine bits, D8 : D0, are used to configure and control
the outputs and their protection features.
accommodate those applications where daisy-chaining is
desirable, or to confirm transmitted data, as long as the
messages are all multiples of 16 bits. Any attempt made to
latch in a message that is not 16 bits will be ignored.
configure the device and to control the state of the outputs.
Table 11
D5
0
0
0
Multiple messages can be transmitted in succession to
The 15XS3400 has defined registers, which are used to
Message Bit Description
CSNS_en
PWM4_s
OC0_s
SR1_s
SOA4
summarizes the SI registers.
D4
1
0
PWM3_s
OCHI_s
CSNS1
SR0_s
SOA3
D3
1
0
LOGIC COMMANDS AND REGISTERS
FUNCTIONAL DEVICE OPERATION
DELAY2_s
OCLO1_s
PWM2_s
CSNS0
SOA2
Table 12
D2
0
0
s
OCLCO0_s OC_mode_
OLLED_en
DELAY1_s DELAY0_s
).
PWM1_s
SOA1
D1
_s
X
1
0
CSNS_ratio
PWM0_s
OV_dis
15XS3400
SOA0
D0
_s
s
1
0
35