EVAL-AD7730EBZ Analog Devices Inc, EVAL-AD7730EBZ Datasheet - Page 2

• Manufacturer Part Number: EVAL-AD7730EBZ
• Description: BOARD EVAL FOR AD7730
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD7730EBZ

• Number Of Adc's: 1
• Number Of Bits: 24
• Sampling Rate (per Second): 1.2k
• Data Interface: Serial
• Inputs Per Adc: 2 Differential
• Input Range: ±80 mV
• Power (typ) @ Conditions: 125mW @ 1.2kSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7730
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: EVAL-AD7730EB; EVAL-AD7730EB

EVAL-AD7730EB
Link Options
There are a number of link options on the evaluation board which should be set for the required operating setup before using the
board. The functions of these link options are described in detail below.
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
This option selects the master clock option for the AD7730. The master clock source comes from the on-board crystal or
This link option is used to determine whether the AD7730 is in its normal operating mode or its STANDBY (power-
This link option is used to select the reference source for the AD7730's REF IN(-) input.
This link controls the polarity of the serial clock.
This link option is used to select the reference source for the AD7730's REF IN(+) input.
This link is in series with the ACX pin.
This link is in series with the ACX pin.
This link is in series with the AIN2(+)/D1 pin.
This link is in series with the AIN2(-)/D0 pin.
Function
from an external clock source via SKT11. This is a double link and both links must be moved together for correct
operation.
With both links in position A, the external clock option is selected and an externally applied clock to SKT 11 is routed to
the MCLK IN pin of the AD7730.
With both links in position B, the on-board crystal is selected and provides the master clock for the AD7730.
down) mode.
With this link in position A, the STANDBY input of the AD7730 is connected to a logic high thus configuring the part
for normal operation.
With this link in position B, the STANDBY input of the AD7730 is connected to a logic low and the AD7730 is placed
in its power-down mode where its power dissipation is typically 100 W.
With this link in position A, the REF IN(-) pin of the AD7730 is connected directly to AGND.
With this link in position B, the REF IN(-) pin of the AD7730 is connected to SKT10. An external voltage connected to
SKT10 can now be used for REF IN(-).
With this link in position A, the POL pin of the AD7730 is connected to a logic high. With this input high, the first
transition of the serial clock in a data transfer is from a high to a low. This link should be in position A when operating
with the evaluation board software.
With this link in position B, the POL pin of the AD7730 is connected to a logic low. With this input low, the first
transition of the serial clock in a data transfer is from a low to a high.
With this link in position A, the REF IN (+) pin of the AD7730 is connected directly to the output of the on-board
reference, the AD780.
With this link in position B, the REF IN (+) pin of the AD7730 is connected directly to AV
With this link in position C, the REF IN(+) pin of the AD7730 is connected to SKT9. An external voltage connected to
SKT9 can now be used for REF IN(+).
With this link in place, SKT5 provides the ACX signal from the AD7730.
With this link in place, SKT6 provides the ACX signal from the AD7730.
With this link in place, SKT8 is connected directly to the AIN2(+)/D1 pin.
This link may be removed so that an analog input signal at SKT8 can be connected to the component grid for signal
conditioning before being applied to the AIN2(+) input of the AD7730.
With this link in place, SKT7 is connected directly to the AIN2(-)/D0 pin.
This link may be removed so that an analog input signal at SKT7 can be connected to the component grid for signal
conditioning before being applied to the AIN2(-) input of the AD7730.
–2–
DD
.
REV. A