EVAL-AD7730EBZ Analog Devices Inc, EVAL-AD7730EBZ Datasheet - Page 3

BOARD EVAL FOR AD7730

EVAL-AD7730EBZ

Manufacturer Part Number
EVAL-AD7730EBZ
Description
BOARD EVAL FOR AD7730
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD7730EBZ

Number Of Adc's
1
Number Of Bits
24
Sampling Rate (per Second)
1.2k
Data Interface
Serial
Inputs Per Adc
2 Differential
Input Range
±80 mV
Power (typ) @ Conditions
125mW @ 1.2kSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7730
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
EVAL-AD7730EB
EVAL-AD7730EB
Link Options (ctnd)
Link No.
LK10
LK11
Setup Conditions
Table I shows the position in which all the links are set when the
evaluation board is sent out.
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
LK10
LK11
EVALUATION BOARD INTERFACING
Interfacing to the evaluation board is either via a 9-way D-Type
connector, SKT1, or a 36-way Centronics connector, SKT2.
The pinout for the SKT1 connector is given in Figure 1 and its
corresponding pin designations are given in Table II. The
pinout for this SKT2 connector is shown in Figure 2 and its pin
designations are given in Table III. The evaluation board should
be powered up before a cable is connected to either of the
connectors.
SKT2 is used to connect the evaluation board to the printer
port (parallel port) of a PC. Connection between the two is
direct via a standard parallel printer port cable. SKT1 is used to
connect the evaluation board to any other system.
REV. A
Function
This link is in series with the AIN1(+) analog input.
With this link in place, the analog input on the SKT3 input is connected directly to the AIN1(+) input on the part.
This link may be removed so that the input signal at SKT3 can be connected to the component grid for signal condition-
ing before being applied to the AIN1(+) input of the AD7730.
This link is in series with the AIN1(-) analog input.
With this link in place, the analog input on the SKT4 input is connected directly to the AIN1(-) input on the part.
This link may be removed so that the input signal at SKT4 can be connected to the component grid for signal condition-
ing before being applied to the AIN1(-) input of the AD7730.
Position Function.
B
A
A
A
B
IN
IN
IN
IN
IN
IN
Table I. Initial Link Positions
Both links in position B to select the
Normal Operating Mode.
REF IN(-) connected directly to
POL pin of AD7730 tied high.
REF IN(+) connected to the AV
ACX connected to SKT6.
SKT8 connected to AIN2(+)/D1.
SKT7 connected to AIN2(-)/D0.
SKT3 connected to AIN1(+).
SKT4 connected to AIN1(-).
on-board crystal oscillator as the master
clock for the board.
AGND.
ACX connected to SKT5.
DD
.
–3–
1
2
3
4
5
6
7
8
9
NOTE
1
part of the SKT2 pin designations description.
An explanation of the AD7730 functions mentioned here is given in Table III as
SCLK
RDY
CS
RESET
DIN
DGND
DOUT
DV
NC
DD
Table II. SKT1 Pin Designations
Figure 2. SKT1 Pin Configuration
Serial Clock. The signal on this pin is buffered
before being applied to the SCLK pin of the
AD7730.
Logic Output. This is a buffered version of the
signal on the AD7730's DRDY pin.
Chip Select. The signal on this pin is buffered
before being applied to the CS pin of the
AD7730.
Reset Input. The signal on this pin is buffered
before being applied to the RESET pin of the
AD7730.
Serial Data Input. Data applied to this pin is
buffered before being applied to the AD7730's
DIN pin.
Ground reference point for digital circuitry.
Connects to the DGND plane on the evaluation
board.
Serial Data Output. This is a buffered version of
the signal on the AD7730's DOUT pin.
Digital Supply Voltage. The DV
the evaluation board can be supplied via this pin
provided no voltage is applied to the main DV
terminal.
No Connect. The signal on this pin is buffered
before being applied to the SYNC pin of the
AD7730.
1
6
2
7
3
EVAL-AD7730EB
8
4
9
5
DD
1
voltage for
DD

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