EVAL-AD7678CB Analog Devices Inc, EVAL-AD7678CB Datasheet - Page 19

BOARD EVALUATION FOR AD7678

EVAL-AD7678CB

Manufacturer Part Number
EVAL-AD7678CB
Description
BOARD EVALUATION FOR AD7678
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheets

Specifications of EVAL-AD7678CB

Number Of Adc's
1
Number Of Bits
18
Sampling Rate (per Second)
100k
Data Interface
Serial, Parallel
Inputs Per Adc
1 Differential
Input Range
±VREF
Power (typ) @ Conditions
31mW @ 100kSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7678
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
POWER DISSIPATION VERSUS THROUGHPUT
The AD7678 automatically reduces its power consumption at
the end of each conversion phase. During the acquisition phase,
the operating currents are very low, which allows for a signifi-
cant power savings when the conversion rate is reduced, as
shown in Figure 26. This feature makes the AD7678 ideal for
very low power battery applications.
It should be noted that the digital interface remains active even
during the acquisition phase. To reduce the operating digital
supply currents even further, the digital inputs need to be
driven close to the power rails (DVDD and DGND), and
OVDD should not exceed DVDD by more than 0.3 V.
CONVERSION CONTROL
Figure 27 shows the detailed timing diagrams of the conversion
process. The AD7678 is controlled by the CNVST signal, which
initiates conversion. Once initiated, it cannot be restarted or
aborted, even by the power-down input PD, until the
conversion is complete. The CNVST signal operates
independently of the CS and RD signals.
100000
10000
1000
100
0.1
10
1
1
Figure 26. Power Dissipation vs. Sample Rate
10
SAMPLING RATE (SPS)
100
1k
10k
PDBUF HIGH
03084-0-032
100k
Rev. A | Page 19 of 28
Although CNVST is a digital signal, it should be designed with
special care with fast, clean edges and levels with minimum
overshoot and undershoot or ringing.
For other applications, conversions can be automatically
initiated. If CNVST is held low when BUSY is low, the AD7678
controls the acquisition phase and then automatically initiates a
new conversion. By keeping CNVST low, the AD7678 keeps the
conversion process running by itself. It should be noted that the
analog input has to be settled when BUSY goes low. Also, at
power-up, CNVST should be brought low once to initiate the
conversion process. In this mode, the AD7678 could sometimes
run slightly faster than the guaranteed limits of 100 kSPS.
CNVST
MODE
BUSY
CNVST
RESET
BUSY
DATA
BUS
ACQUIRE
t
t
3
5
Figure 27. Basic Conversion Timing
t
1
CONVERT
Figure 28. RESET Timing
t
7
t
4
t
9
t
t
6
2
ACQUIRE
t
8
t
8
AD7678
CONVERT
03084-0-034
03084-0-033

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