EVAL-AD7622CBZ Analog Devices Inc, EVAL-AD7622CBZ Datasheet - Page 5

• Manufacturer Part Number: EVAL-AD7622CBZ
• Description: BOARD EVALUATION FOR AD7622
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of EVAL-AD7622CBZ

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 2M
• Data Interface: Serial, Parallel
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 70mW @ 2MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TIMING SPECIFICATIONS
AVDD = DVDD = 2.5 V; OVDD = 2.3 V to 3.6 V; V
Table 3.
Parameter
CONVERSION AND RESET (Refer to Figure 31 and Figure 32)
PARALLEL INTERFACE MODES (Refer to Figure 33 to Figure 36 )
MASTER SERIAL INTERFACE MODES
SLAVE SERIAL INTERFACE MODES (Refer to Figure 40 and Figure 41)
See Notes on next page.
Convert Pulse Width
Time Between Conversions (Warp Mode
CNVST Low to BUSY High Delay
BUSY High All Modes (Except Master Serial Read After Convert)
Aperture Delay
End of Conversion to BUSY Low Delay
Conversion Time (Warp Mode/Normal Mode)
Acquisition Time (Warp Mode/Normal Mode)
RESET Pulse Width
RESET Low to BUSY High Delay
BUSY High Time from RESET Low
CNVST Low to Data Valid Delay (Warp Mode/Normal Mode)
Data Valid to BUSY Low Delay
Bus Access Request to Data Valid
Bus Relinquish Time
CS Low to SYNC Valid Delay
CS Low to Internal SCLK Valid Delay
CS Low to SDOUT Delay
CNVST Low to SYNC Delay (Warp Mode/Normal Mode)
SYNC Asserted to SCLK First Edge Delay
Internal SCLK Period
Internal SCLK High
Internal SCLK Low
SDOUT Valid Setup Time
SDOUT Valid Hold Time
SCLK Last Edge to SYNC Delay
CS High to SYNC HI-Z
CS High to Internal SCLK HI-Z
CS High to SDOUT HI-Z
BUSY High in Master Serial Read After Convert
CNVST Low to SYNC Asserted Delay (Warp Mode/Normal Mode)
SYNC Deasserted to BUSY Low Delay
External SCLK Setup Time
External SCLK Active Edge to SDOUT Delay
SDIN Setup Time
SDIN Hold Time
External SCLK Period
External SCLK High
External SCLK Low
Warp Mode/Normal Mode
6
6
6
6
6
6
4
4
5
(Refer to Figure 37 and Figure 38)
5
2
/Normal Mode
6
REF
= 2.5 V; all specifications T
3
)
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Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
38
39
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
MIN
to T
MAX
Min
15
500/667
10
140/182
15
2
2
2
8
2
3
1
0
0
5
1
5
5
12.5
5
5
, unless otherwise noted.
Typ
1
10
500
15/135
See Table 4
375/500
13
Max
70
23
360/485
360/485
360/485
20
15
10
10
10
20
10
10
10
8
1
AD7622
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns