EVAL-AD7725CBZ Analog Devices Inc, EVAL-AD7725CBZ Datasheet - Page 19

• Manufacturer Part Number: EVAL-AD7725CBZ
• Description: BOARD EVALUATION FOR AD7725
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD7725CBZ

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 900k
• Data Interface: Serial, Parallel
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 615mW @ 900kSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7725
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 20 shows an example of a filtering function implemented
on the postprocessor. Figure 20a shows the data path representa-
tion of an FIR filter, while Figure 20b shows how this algorithm
would be implemented on the AD7725. Because the postprocessor
can implement three filter taps per MAC block, 1.3 MAC
blocks are required to implement a 4-tap FIR filter. This is a
useful guideline when calculating the design requirements for a
new application.
PROGRAMMING THE POSTPROCESSOR
The postprocessor is programmed by loading a user-defined
filter in the form of a configuration file into the device.
Generating a Configuration File to Load into the Postprocessor
A user-defined configuration file can be generated to load into
the postprocessor on the AD7725 to program the multipliers
and accumulators to perform user-specific filtering require-
ments. The configuration file can be generated using a digital
filter design package called Filter Wizard, which is available
from the Analog Devices website.
Filter Wizard
This digital filter design package allows the user to design differ-
ent filter types and then generates the appropriate configuration
file to be loaded into the postprocessor. This application includes
the ability to specify a range of different filter options including
single or multistage; normalized or user-specified output
frequency; FIR or IIR; low-pass, band-pass; Window type;
pass-band frequency and ripple; stop-band frequency, attenua-
tion and ripple; daisy-chaining and interlacing. It also informs
the user of the power dissipation of the AD7725 associated
with the particular filter designed. This is to avoid filters being
designed that result in the device exceeding its maximum power
specifications. The magnitude, phase, and impulse responses
can be plotted so that the user knows the filter response (cutoff
REV. A
SIGNAL
SIGNAL
SIGNAL
SIGNAL
OUT
OUT
IN
IN
C
Figure 20. AD7725 Postprocessor Mapping
0
b) FIR Postprocessor Implementation
C
a) FIR Data Path Representation
0
Z
Z
–1
–1
1 MAC BLOCK
C
C
Z
1
1
–1
Z
–1
C
C
Z
–1
2
2
Z
–1
C
C
3
3
Z
–1
Z
Z
–1
–1
–19–
frequency, transition width, attenuation) before generating the
coefficients. Once the filter characteristics have been decided,
the configuration file is generated and will be ready for loading
into the postprocessor.
Filter Configuration File Format
The configuration file that is generated by the Filter Wizard is
made up of 8272 bits of data. The first word in the file is called
the ID word, and the device will accept the configuration file only
if this is 0x7725. The rest of the configuration data is split into 12
blocks of 672 bits. The AD7725 postprocessor therefore accepts
672 bits at a time (42, 16-bit words). Each block of 672 bits is
followed by a cyclic redundancy check (CRC) word. The ID
word and the CRC words are used by the device to check for
errors in the configuration file and are not actually written to the
postprocessor. The postprocessor therefore holds 8064 bits of
data (672
for further information on how configuration errors are detected
and handled. The filter coefficients in the configuration file that
are loaded into the postprocessor have 24-bit precision and have
a value in the range –8 ≤ coefficient < +8. The coefficients are
made up of 1 sign bit, 3 magnitude bits left of the decimal point,
and 20 right of the decimal point.
Using the Internal Default Filter
The AD7725 has a default filter stored in internal ROM that
can be loaded into the postprocessor. This functionality allows
the user to evaluate the device without having to download a
configuration file. The default filter is a two-stage, low-pass, FIR
filter whose specifications are directly related to the CLKIN
frequency. With a CLKIN frequency of 9.6 MHz, the default
filter has a cutoff frequency of 49 kHz and a stop-band frequency
of 72.7 kHz. This filter has a total decimation by 4, which occurs
in the first stage, resulting in the output data being available to the
interface at a frequency of CLKIN/32. For more detailed specifica-
tions on this filter see the Preset Filter, Default Filter, and
Postprocessor Characteristics section. When powered up in
boot-from-ROM mode, the AD7725 will automatically load the
default filter characteristic into the postprocessor. Figure 21
shows the default filter response, when operating with a 9.6 MHz
CLKIN frequency.
Figure 21. Default Filter Response for CLKIN = 9.6 MHz
–100
–120
–140
–160
–20
–40
–60
–80
0
0
12). See the Serial Mode and Parallel Mode sections
50
FREQUENCY – kHz
100
AD7725
150