MAX1403EVKIT Maxim Integrated Products, MAX1403EVKIT Datasheet - Page 4

• Manufacturer Part Number: MAX1403EVKIT
• Description: EVAL KIT FOR MAX1403
• Manufacturer: Maxim Integrated Products

Specifications of MAX1403EVKIT

• Number Of Adc's: 1
• Number Of Bits: 18
• Sampling Rate (per Second): 480
• Data Interface: Serial
• Inputs Per Adc: 6 Single Ended
• Input Range: ±VREF/gain
• Power (typ) @ Conditions: 16.9mW @ 480SPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 70°C
• Utilized Ic / Part: MAX1403
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The digital filter on the MAX1403 can be configured for
SINC
frequency. (SINC
(SIN(X) ÷ X)
racy. The SINC
accuracy. Alternatively, the raw modulator output can be
driven out the DOUT pin; however, the EV kit software
cannot read data from the MAX1403 in this mode.
The MAX1403 EV kit software can average the mea-
surements from the calibration channels and use the
measured values to correct the voltage displays. The
calibration algorithm assumes that the CALOFF inputs
are externally connected together and that the CAL-
GAIN inputs are externally connected to the reference
voltage (VREF). View the calibration tool by selecting it
from the Show menu.
The software automatically disables calibration if either
of the calibration channels reports a code of 0 or
262143. This is to prevent erroneous calibration when
using a transfer function that does not include both 0V
and VREF.
When Use CALOFF and CALGAIN for Calibration is
checked, the software averages the raw A/D codes for
the CALOFF and CALGAIN channels. The average is
calculated as a weighted sum of the new data and the
old average value. The Slower/Faster slide bar controls
the weight of the new data vs. the weight of the old
average.
The EV kit software assumes that all three transfer func-
tion registers are set to the same value.
This calibration affects only the displayed voltage, not
the raw code numbers. The average CALOFF and
CALGAIN code values are used as the endpoints of a
linear interpolation, with CALOFF measuring 0V and
CALGAIN measuring VREF.
The linear interpolation formula is as follows:
Note: When using the calibration tool with the
MAX1403 in buffered mode, CALOFF+ and CALOFF-
should be disconnected from GND and connected
instead to REFIN+ so that they remain within the speci-
fied input range.
To sample data at full speed, select Sample from the
main display menu, make your selections, and click on
MAX1403 EV System
4
Voltage
_______________________________________________________________________________________
3
or SINC
(
3
CALGAINcode CALOFFcode PGAgain
.) The SINC
1
1
filter provides faster settling time with less
operation, which affects the filter cutoff
1
VREF Code CALOFFcode
means SIN(X) ÷ X, and SINC
(
3
filter is required for 16-bit accu-
Calibration Tool
Sampling Tool
)
)
3
means
the Begin Sampling button. Sampling rate is controlled
by the Configuration tool. Sample size is restricted to a
power of two. Sample Size controls the number of sam-
ples collected on each selected channel. After the
samples have been collected, the data is automatically
uploaded to the host and is graphed. Once displayed,
the data may be saved to a file.
While the Sampling tool is open, the other windows are
locked out. Close the Sampling tool by clicking the
Close icon in the upper corner.
This tool displays all of the internal registers of the
MAX1403. Modify any bit value by checking or
unchecking its box. (The START bit and the zero bits in
the Special Function register (SFR) cannot be modi-
fied). The Read All Registers button causes the soft-
ware to read all of the MAX1403’s registers. (Not func-
tional when the MDOUT or FULLPD bit is set.) Refer to
Table 1 for a guide to register bit functions.
Setting the FSYNC control bit inhibits the MAX1403
from performing its self-timed measurements. If
FSYNC = 1 when it is time to perform a measurement,
the MAX1403 simply skips that measurement. Thus,
power-line frequency rejection is not affected by the
FSYNC bit.
Setting the STDBY bit places the part in low-power
standby mode. The serial interface and the CLK oscilla-
tor continue to operate. The part can be restored to
normal operation by clearing the STDBY bit.
Setting the MDOUT bit makes the raw modulator output
available on the DOUT pin; however, the EV kit software
cannot read data from the MAX1403 in this mode.
Setting the FULLPD bit in the SFR register places the
part in full power-down mode. The master oscillator
does not run. To restore normal operation, click on the
Reset menu item in the main display. This causes the
68HC11 software to pulse the MAX1403 RESET pin.
The three transfer function registers (TF1, TF2, TF3) con-
trol how input voltage is mapped to code values. The
transfer function registers control a programmable-gain
amplifier (PGA) and an offset-correction DAC.
If U/B = 1, the transfer function maps unipolar voltages
between 0V and VREF. If U/B = 0, then the transfer
function maps bipolar voltages between -VREF and
+VREF. Next, the PGA increases the code-per-volt pro-
Transfer Function Registers (TF1, TF2, TF3)
Communications Register (COMMS)
Special Function Register (SFR)
Register Display Tool